feat: working basic firmware with legacy USB API
- Successful compilation with Zephyr 4.3.0 - Basic gs_usb USB interface implementation - CAN-FD support with FDCAN2 interface - PFET control via UART (simplified from USB CDC) - Custom board definition for STM32G0B1KBU6 - Deprecated warnings present but functional - Memory usage: 51KB Flash (9.8%), 21.6KB RAM (14.7%) Next: Migrate to new USB device stack API to remove warnings
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@@ -1,102 +1,160 @@
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/*
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* Copyright (c) 2024 EWS Board
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* Based on STM32G0B1RE-NUCLEO
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/g0/stm32g0b1Xb.dtsi>
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#include <st/g0/stm32g0b1k(b-c-e)ux-pinctrl.dtsi>
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#include <st/g0/stm32g0b1Xe.dtsi>
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#include <st/g0/stm32g0b1r(b-c-e)tx-pinctrl.dtsi>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "EWS Board STM32G0B1KBU6";
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compatible = "ews,ews";
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model = "EWS STM32G0B1KBU6 board";
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compatible = "st,stm32g0b1kb-ews";
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chosen {
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zephyr,console = &cdc_acm_uart0;
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zephyr,shell-uart = &cdc_acm_uart0;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,canbus = &fdcan2;
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};
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chosen {
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zephyr,console = &usart1;
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zephyr,shell-uart = &usart1;
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zephyr,uart-mcumgr = &usart1;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,code-partition = &slot0_partition;
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zephyr,canbus = &fdcan2;
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};
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leds {
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compatible = "gpio-leds";
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status_led: led_0 {
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gpios = <&gpiob 4 GPIO_ACTIVE_HIGH>;
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label = "Status LED";
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};
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};
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leds: leds {
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compatible = "gpio-leds";
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status_led: led_0 {
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gpios = <&gpiob 4 GPIO_ACTIVE_HIGH>;
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label = "Status LED";
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};
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};
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pfets {
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compatible = "gpio-leds";
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pfet1: pfet_1 {
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gpios = <&gpioa 8 GPIO_ACTIVE_HIGH>;
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label = "PFET1 Control";
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};
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pfet2: pfet_2 {
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gpios = <&gpiob 2 GPIO_ACTIVE_HIGH>;
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label = "PFET2 Control";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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pfet1: pfet1 {
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label = "PFET1";
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gpios = <&gpioa 8 GPIO_ACTIVE_HIGH>;
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zephyr,code = <INPUT_KEY_1>;
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};
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pfet2: pfet2 {
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label = "PFET2";
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gpios = <&gpiob 2 GPIO_ACTIVE_HIGH>;
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zephyr,code = <INPUT_KEY_2>;
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};
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};
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aliases {
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led0 = &status_led;
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pfet0 = &pfet1;
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pfet1 = &pfet2;
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};
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aliases {
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led0 = &status_led;
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pfet0 = &pfet1;
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pfet1 = &pfet2;
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watchdog0 = &iwdg;
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die-temp0 = &die_temp;
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volt-sensor0 = &vref;
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volt-sensor1 = &vbat;
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};
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};
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&clk_lsi {
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status = "okay";
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};
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&clk_hsi {
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status = "okay";
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status = "okay";
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};
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&clk_hsi48 {
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status = "okay";
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crs-usb-sof;
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};
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&pll {
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div-m = <1>;
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mul-n = <8>;
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div-q = <2>;
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div-r = <2>;
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clocks = <&clk_hsi>;
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status = "okay";
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div-m = <1>;
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mul-n = <8>;
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div-p = <2>;
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div-q = <2>;
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div-r = <2>;
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clocks = <&clk_hsi>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(64)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <1>;
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(64)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <1>;
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};
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zephyr_udc0: &usb {
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pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
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pinctrl-names = "default";
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status = "okay";
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};
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&usart1 {
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pinctrl-0 = <&usart1_tx_pc4 &usart1_rx_pc5>;
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pinctrl-names = "default";
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current-speed = <115200>;
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status = "okay";
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};
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&rtc {
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clocks = <&rcc STM32_CLOCK(APB1, 10)>,
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<&rcc STM32_SRC_LSI RTC_SEL(2)>;
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status = "okay";
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};
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&iwdg {
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status = "okay";
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};
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&fdcan2 {
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pinctrl-0 = <&fdcan2_rx_pb0 &fdcan2_tx_pb1>;
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pinctrl-names = "default";
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status = "okay";
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clocks = <&rcc STM32_CLOCK(APB1, 12)>,
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<&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>;
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pinctrl-0 = <&fdcan2_rx_pb0 &fdcan2_tx_pb1>;
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pinctrl-names = "default";
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status = "okay";
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};
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&usb {
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pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
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pinctrl-names = "default";
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status = "okay";
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cdc_acm_uart0: cdc_acm_uart0 {
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compatible = "zephyr,cdc-acm-uart";
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};
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&die_temp {
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status = "okay";
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};
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&gpioa {
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status = "okay";
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&vref {
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status = "okay";
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};
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&gpiob {
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status = "okay";
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&vbat {
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status = "okay";
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};
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&flash0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 0x00002000>;
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};
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slot0_partition: partition@2000 {
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label = "image-0";
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reg = <0x00002000 0x0001E000>;
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};
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};
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};
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 DT_SIZE_K(16)>;
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read-only;
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};
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slot0_partition: partition@4000 {
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label = "image-0";
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reg = <0x00004000 DT_SIZE_K(96)>;
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};
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slot1_partition: partition@1c000 {
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label = "image-1";
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reg = <0x0001c000 DT_SIZE_K(16)>;
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};
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};
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};
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stm32_lp_tick_source: &lptim1 {
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clocks = <&rcc STM32_CLOCK(APB1, 31)>,
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<&rcc STM32_SRC_LSI LPTIM1_SEL(1)>;
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status = "okay";
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};
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