diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..c795b05 --- /dev/null +++ b/.gitignore @@ -0,0 +1 @@ +build \ No newline at end of file diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 0000000..91f8b59 --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,8 @@ +cmake_minimum_required(VERSION 3.20) + +list(APPEND BOARD_ROOT ${CMAKE_CURRENT_SOURCE_DIR}) + +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +project(firebeatle) + +target_sources(app PRIVATE src/main.c) diff --git a/README.de.md b/README.de.md new file mode 100644 index 0000000..b632f61 --- /dev/null +++ b/README.de.md @@ -0,0 +1 @@ +# firebeatle diff --git a/README.md b/README.md new file mode 100644 index 0000000..b632f61 --- /dev/null +++ b/README.md @@ -0,0 +1 @@ +# firebeatle diff --git a/boards/dfrobot/firebeetle2_esp32c6/board.yml b/boards/dfrobot/firebeetle2_esp32c6/board.yml index a630d1b..01c7b77 100644 --- a/boards/dfrobot/firebeetle2_esp32c6/board.yml +++ b/boards/dfrobot/firebeetle2_esp32c6/board.yml @@ -4,3 +4,49 @@ board: vendor: dfrobot socs: - name: esp32c6 + variants: + - name: firebeetle2_esp32c6_hpcore + board_name: firebeetle2_esp32c6_hpcore + meta: + name: FireBeetle 2 ESP32-C6 (HP-Core) + type: mcu + arch: riscv + toolchain: + - zephyr + - gnuarmemb + - xtools + supported: + - uart + - gpio + - i2c + - spi + - wifi + - ble + ram: 512 + flash: 4096 + testing: + ignore_tags: + - net + - bluetooth + - name: firebeetle2_esp32c6_lpcore + board_name: firebeetle2_esp32c6_lpcore + meta: + name: FireBeetle 2 ESP32-C6 (LP-Core) + type: mcu + arch: riscv + toolchain: + - zephyr + - gnuarmemb + - xtools + supported: + - uart + - gpio + - i2c + - spi + ram: 16 + flash: 0 + testing: + ignore_tags: + - net + - bluetooth + default_variant: firebeetle2_esp32c6_hpcore diff --git a/boards/espressif/esp32_devkitc/Kconfig b/boards/espressif/esp32_devkitc/Kconfig new file mode 100644 index 0000000..3187645 --- /dev/null +++ b/boards/espressif/esp32_devkitc/Kconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024-2025 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_ESP32_DEVKITC_ESP32_PROCPU + default 256 if BOARD_ESP32_DEVKITC_ESP32_APPCPU diff --git a/boards/espressif/esp32_devkitc/Kconfig.esp32_devkitc b/boards/espressif/esp32_devkitc/Kconfig.esp32_devkitc new file mode 100644 index 0000000..b843530 --- /dev/null +++ b/boards/espressif/esp32_devkitc/Kconfig.esp32_devkitc @@ -0,0 +1,7 @@ +# Copyright (c) 2023-2025 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32_DEVKITC + select SOC_ESP32_WROVER_E_N4R8 + select SOC_ESP32_PROCPU if BOARD_ESP32_DEVKITC_ESP32_PROCPU + select SOC_ESP32_APPCPU if BOARD_ESP32_DEVKITC_ESP32_APPCPU diff --git a/boards/espressif/esp32_devkitc/Kconfig.sysbuild b/boards/espressif/esp32_devkitc/Kconfig.sysbuild new file mode 100644 index 0000000..3a2d17a --- /dev/null +++ b/boards/espressif/esp32_devkitc/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp32_devkitc/board.cmake b/boards/espressif/esp32_devkitc/board.cmake new file mode 100644 index 0000000..ad53de1 --- /dev/null +++ b/boards/espressif/esp32_devkitc/board.cmake @@ -0,0 +1,11 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() + +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp32_devkitc/board.yml b/boards/espressif/esp32_devkitc/board.yml new file mode 100644 index 0000000..fbd9c38 --- /dev/null +++ b/boards/espressif/esp32_devkitc/board.yml @@ -0,0 +1,6 @@ +board: + name: esp32_devkitc + full_name: ESP32-DevKitC + vendor: espressif + socs: + - name: esp32 diff --git a/boards/espressif/esp32_devkitc/doc/img/esp32_devkitc_wrover.jpg b/boards/espressif/esp32_devkitc/doc/img/esp32_devkitc_wrover.jpg new file mode 100644 index 0000000..9515257 Binary files /dev/null and b/boards/espressif/esp32_devkitc/doc/img/esp32_devkitc_wrover.jpg differ diff --git a/boards/espressif/esp32_devkitc/doc/index.rst b/boards/espressif/esp32_devkitc/doc/index.rst new file mode 100644 index 0000000..b7bf864 --- /dev/null +++ b/boards/espressif/esp32_devkitc/doc/index.rst @@ -0,0 +1,256 @@ +.. zephyr:board:: esp32_devkitc + +Overview +******** + +ESP32 is a series of low cost, low power system on a chip microcontrollers +with integrated Wi-Fi & dual-mode Bluetooth. The ESP32 series employs a +Tensilica Xtensa LX6 microprocessor in both dual-core and single-core +variations. ESP32 is created and developed by Espressif Systems, a +Shanghai-based Chinese company, and is manufactured by TSMC using their 40nm +process. For more information, check `ESP32-DevKitC`_. + +The features include the following: + +- Dual core Xtensa microprocessor (LX6), running at 160 or 240MHz +- 520KB of SRAM +- 802.11b/g/n/e/i +- Bluetooth v4.2 BR/EDR and BLE +- Various peripherals: + + - 12-bit ADC with up to 18 channels + - 2x 8-bit DACs + - 10x touch sensors + - Temperature sensor + - 4x SPI + - 2x I2S + - 2x I2C + - 3x UART + - SD/SDIO/MMC host + - Slave (SDIO/SPI) + - Ethernet MAC + - CAN bus 2.0 + - IR (RX/TX) + - Motor PWM + - LED PWM with up to 16 channels + - Hall effect sensor + +- Cryptographic hardware acceleration (RNG, ECC, RSA, SHA-2, AES) +- 5uA deep sleep current + +For more information, check the datasheet at `ESP32 Datasheet`_ or the technical reference +manual at `ESP32 Technical Reference Manual`_. + +Asymmetric Multiprocessing (AMP) +******************************** + +ESP32-DevKitC-WROVER allows 2 different applications to be executed in ESP32 SoC. Due to its dual-core architecture, each core can be enabled to execute customized tasks in stand-alone mode +and/or exchanging data over OpenAMP framework. See :zephyr:code-sample-category:`ipc` folder as code reference. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +System requirements +=================== + +Prerequisites +------------- + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32_devkitc + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32_devkitc/esp32/procpu + :goals: build + +The usual ``flash`` target will work with the ``esp32_devkitc`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32_devkitc/esp32/procpu + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32_devkitc + +Debugging +********* + +ESP32 support on OpenOCD is available at `OpenOCD ESP32`_. + +On the ESP32-DevKitC board, the JTAG pins are not run to a +standard connector (e.g. ARM 20-pin) and need to be manually connected +to the external programmer (e.g. a Flyswatter2): + ++------------+-----------+ +| ESP32 pin | JTAG pin | ++============+===========+ +| 3V3 | VTRef | ++------------+-----------+ +| EN | nTRST | ++------------+-----------+ +| IO14 | TMS | ++------------+-----------+ +| IO12 | TDI | ++------------+-----------+ +| GND | GND | ++------------+-----------+ +| IO13 | TCK | ++------------+-----------+ +| IO15 | TDO | ++------------+-----------+ + +Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32`_. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32_devkitc/esp32/procpu + :goals: build flash + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32_devkitc/esp32/procpu + :goals: debug + +Note on Debugging with GDB Stub +=============================== + +GDB stub is enabled on ESP32. + +* When adding breakpoints, please use hardware breakpoints with command + ``hbreak``. Command ``break`` uses software breakpoints which requires + modifying memory content to insert break/trap instructions. + This does not work as the code is on flash which cannot be randomly + accessed for modification. + +References +********** + +.. target-notes:: + +.. _`ESP32-DevKitC`: https://docs.espressif.com/projects/esp-dev-kits/en/latest/esp32/esp32-devkitc/index.html +.. _`ESP32 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf +.. _`ESP32 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf +.. _`JTAG debugging for ESP32`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-guides/jtag-debugging/index.html +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/espressif/esp32_devkitc/esp32_devkitc-pinctrl.dtsi b/boards/espressif/esp32_devkitc/esp32_devkitc-pinctrl.dtsi new file mode 100644 index 0000000..dbfd9d0 --- /dev/null +++ b/boards/espressif/esp32_devkitc/esp32_devkitc-pinctrl.dtsi @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2022-2025 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + uart1_default: uart1_default { + group1 { + pinmux = ; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + uart2_default: uart2_default { + group1 { + pinmux = ; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + i2s0_default: i2s0_default { + group1 { + pinmux = , + , + , + , + ; + output-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + i2s1_default: i2s1_default { + group1 { + pinmux = , + , + , + , + ; + output-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; +}; diff --git a/boards/espressif/esp32_devkitc/esp32_devkitc_appcpu.dts b/boards/espressif/esp32_devkitc/esp32_devkitc_appcpu.dts new file mode 100644 index 0000000..62427d3 --- /dev/null +++ b/boards/espressif/esp32_devkitc/esp32_devkitc_appcpu.dts @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2023-2025 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include + +/ { + model = "Espressif ESP32-DevkitC APPCPU"; + compatible = "espressif,esp32"; + + chosen { + zephyr,sram = &sram1; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; + }; +}; + +&ipm0 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; diff --git a/boards/espressif/esp32_devkitc/esp32_devkitc_appcpu.yaml b/boards/espressif/esp32_devkitc/esp32_devkitc_appcpu.yaml new file mode 100644 index 0000000..8f2cf6b --- /dev/null +++ b/boards/espressif/esp32_devkitc/esp32_devkitc_appcpu.yaml @@ -0,0 +1,27 @@ +identifier: esp32_devkitc/esp32/appcpu +name: ESP32-DevkitC APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp +vendor: espressif diff --git a/boards/espressif/esp32_devkitc/esp32_devkitc_appcpu_defconfig b/boards/espressif/esp32_devkitc/esp32_devkitc_appcpu_defconfig new file mode 100644 index 0000000..4854664 --- /dev/null +++ b/boards/espressif/esp32_devkitc/esp32_devkitc_appcpu_defconfig @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CLOCK_CONTROL=y diff --git a/boards/espressif/esp32_devkitc/esp32_devkitc_procpu.dts b/boards/espressif/esp32_devkitc/esp32_devkitc_procpu.dts new file mode 100644 index 0000000..b92d20e --- /dev/null +++ b/boards/espressif/esp32_devkitc/esp32_devkitc_procpu.dts @@ -0,0 +1,146 @@ +/* + * Copyright (c) 2023-2025 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include "esp32_devkitc-pinctrl.dtsi" +#include +#include +#include + +/ { + model = "Espressif ESP32-DevkitC PROCPU"; + compatible = "espressif,esp32"; + + aliases { + uart-0 = &uart0; + i2c-0 = &i2c0; + sw0 = &button0; + watchdog0 = &wdt0; + }; + + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "BOOT Button"; + zephyr,code = ; + }; + }; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,bt-hci = &esp32_bt_hci; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&uart1 { + current-speed = <115200>; + pinctrl-0 = <&uart1_default>; + pinctrl-names = "default"; +}; + +&uart2 { + current-speed = <115200>; + pinctrl-0 = <&uart2_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&touch { + debounce-interval-ms = <30>; + href-microvolt = <2700000>; + lref-microvolt = <500000>; + href-atten-microvolt = <1000000>; + filter-mode = ; + filter-debounce-cnt = <1>; + filter-noise-thr = ; + filter-jitter-step = <4>; + filter-smooth-level = ; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + sda-gpios = <&gpio0 21 GPIO_OPEN_DRAIN>; + scl-gpios = <&gpio0 22 GPIO_OPEN_DRAIN>; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&i2s0 { + pinctrl-0 = <&i2s0_default>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&i2s1 { + pinctrl-0 = <&i2s1_default>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; +}; + +&timer0 { + status = "disabled"; +}; + +&timer1 { + status = "disabled"; +}; + +&timer2 { + status = "disabled"; +}; + +&timer3 { + status = "disabled"; +}; + +&trng0 { + status = "okay"; +}; + +&esp32_bt_hci { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp32_devkitc/esp32_devkitc_procpu.yaml b/boards/espressif/esp32_devkitc/esp32_devkitc_procpu.yaml new file mode 100644 index 0000000..7a1a124 --- /dev/null +++ b/boards/espressif/esp32_devkitc/esp32_devkitc_procpu.yaml @@ -0,0 +1,22 @@ +identifier: esp32_devkitc/esp32/procpu +name: ESP32-DevkitC PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - adc + - dac + - gpio + - i2c + - i2s + - watchdog + - uart + - nvs + - pwm + - dac + - spi + - counter + - entropy + - input +vendor: espressif diff --git a/boards/espressif/esp32_devkitc/esp32_devkitc_procpu_defconfig b/boards/espressif/esp32_devkitc/esp32_devkitc_procpu_defconfig new file mode 100644 index 0000000..ea5684d --- /dev/null +++ b/boards/espressif/esp32_devkitc/esp32_devkitc_procpu_defconfig @@ -0,0 +1,8 @@ +# Copyright (c) 2023-2025 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y + +CONFIG_GPIO=y diff --git a/boards/espressif/esp32_devkitc/support/openocd.cfg b/boards/espressif/esp32_devkitc/support/openocd.cfg new file mode 100644 index 0000000..338e6e4 --- /dev/null +++ b/boards/espressif/esp32_devkitc/support/openocd.cfg @@ -0,0 +1,5 @@ +set ESP_RTOS none +set ESP32_ONLYCPU 1 + +source [find interface/ftdi/esp32_devkitj_v1.cfg] +source [find target/esp32.cfg] diff --git a/boards/espressif/esp32_ethernet_kit/CMakeLists.txt b/boards/espressif/esp32_ethernet_kit/CMakeLists.txt new file mode 100644 index 0000000..1185669 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/CMakeLists.txt @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(CONFIG_GPIO_ESP32) + zephyr_library() + zephyr_library_sources(board_init.c) +endif() diff --git a/boards/espressif/esp32_ethernet_kit/Kconfig b/boards/espressif/esp32_ethernet_kit/Kconfig new file mode 100644 index 0000000..a629719 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/Kconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_ESP32_ETHERNET_KIT_ESP32_PROCPU + default 256 if BOARD_ESP32_ETHERNET_KIT_ESP32_APPCPU diff --git a/boards/espressif/esp32_ethernet_kit/Kconfig.defconfig b/boards/espressif/esp32_ethernet_kit/Kconfig.defconfig new file mode 100644 index 0000000..5a36768 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/Kconfig.defconfig @@ -0,0 +1,15 @@ +# ESP32-ETHERNET-KIT board configuration + +# Copyright (c) 2022 Grant Ramsay +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_ESP32_ETHERNET_KIT_ESP32_PROCPU + +config ESP_SPIRAM + default y if !MCUBOOT + +choice SPIRAM_TYPE + default SPIRAM_TYPE_ESPPSRAM64 +endchoice + +endif # BOARD_ESP32_ETHERNET_KIT_ESP32_PROCPU diff --git a/boards/espressif/esp32_ethernet_kit/Kconfig.esp32_ethernet_kit b/boards/espressif/esp32_ethernet_kit/Kconfig.esp32_ethernet_kit new file mode 100644 index 0000000..338226e --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/Kconfig.esp32_ethernet_kit @@ -0,0 +1,9 @@ +# ESP32-ETHERNET-KIT board configuration + +# Copyright (c) 2022 Grant Ramsay +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32_ETHERNET_KIT + select SOC_ESP32_WROVER_E_N4R8 + select SOC_ESP32_PROCPU if BOARD_ESP32_ETHERNET_KIT_ESP32_PROCPU + select SOC_ESP32_APPCPU if BOARD_ESP32_ETHERNET_KIT_ESP32_APPCPU diff --git a/boards/espressif/esp32_ethernet_kit/Kconfig.sysbuild b/boards/espressif/esp32_ethernet_kit/Kconfig.sysbuild new file mode 100644 index 0000000..3a2d17a --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp32_ethernet_kit/board.cmake b/boards/espressif/esp32_ethernet_kit/board.cmake new file mode 100644 index 0000000..2f04d1f --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp32_ethernet_kit/board.yml b/boards/espressif/esp32_ethernet_kit/board.yml new file mode 100644 index 0000000..b7a9626 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/board.yml @@ -0,0 +1,6 @@ +board: + name: esp32_ethernet_kit + full_name: ESP32-Ethernet-Kit + vendor: espressif + socs: + - name: esp32 diff --git a/boards/espressif/esp32_ethernet_kit/board_init.c b/boards/espressif/esp32_ethernet_kit/board_init.c new file mode 100644 index 0000000..1afe1e4 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/board_init.c @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2022 Grant Ramsay + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#define IP101GRI_RESET_N_PIN 5 + +static int board_esp32_ethernet_kit_init(void) +{ + const struct device *gpio = DEVICE_DT_GET(DT_NODELABEL(gpio0)); + + if (!device_is_ready(gpio)) { + return -ENODEV; + } + + /* Enable the Ethernet phy */ + int res = gpio_pin_configure( + gpio, IP101GRI_RESET_N_PIN, + GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH); + + return res; +} + +SYS_INIT(board_esp32_ethernet_kit_init, PRE_KERNEL_2, CONFIG_GPIO_INIT_PRIORITY); diff --git a/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-a-v1.2-layout.jpg b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-a-v1.2-layout.jpg new file mode 100644 index 0000000..a751875 Binary files /dev/null and b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-a-v1.2-layout.jpg differ diff --git a/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-b-v1.0-layout.jpg b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-b-v1.0-layout.jpg new file mode 100644 index 0000000..0a449f0 Binary files /dev/null and b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-b-v1.0-layout.jpg differ diff --git a/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-rmii-clk-from-phy.jpg b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-rmii-clk-from-phy.jpg new file mode 100644 index 0000000..124cdaa Binary files /dev/null and b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-rmii-clk-from-phy.jpg differ diff --git a/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-rmii-clk-to-phy.jpg b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-rmii-clk-to-phy.jpg new file mode 100644 index 0000000..c643f2e Binary files /dev/null and b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-rmii-clk-to-phy.jpg differ diff --git a/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-v1.1-block-diagram.jpg b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-v1.1-block-diagram.jpg new file mode 100644 index 0000000..2ce77e6 Binary files /dev/null and b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-v1.1-block-diagram.jpg differ diff --git a/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-v1.2.jpg b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-v1.2.jpg new file mode 100644 index 0000000..9a756e0 Binary files /dev/null and b/boards/espressif/esp32_ethernet_kit/doc/img/esp32-ethernet-kit-v1.2.jpg differ diff --git a/boards/espressif/esp32_ethernet_kit/doc/img/esp32_ethernet_kit.jpg b/boards/espressif/esp32_ethernet_kit/doc/img/esp32_ethernet_kit.jpg new file mode 100644 index 0000000..3811dfc Binary files /dev/null and b/boards/espressif/esp32_ethernet_kit/doc/img/esp32_ethernet_kit.jpg differ diff --git a/boards/espressif/esp32_ethernet_kit/doc/index.rst b/boards/espressif/esp32_ethernet_kit/doc/index.rst new file mode 100644 index 0000000..22a9429 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/doc/index.rst @@ -0,0 +1,621 @@ +.. zephyr:board:: esp32_ethernet_kit + +Overview +******** + +The ESP32-Ethernet-Kit is an Ethernet-to-Wi-Fi development board that enables +Ethernet devices to be interconnected over Wi-Fi. At the same time, to provide +more flexible power supply options, the ESP32-Ethernet-Kit also supports power +over Ethernet (PoE). + +.. _get-started-esp32-ethernet-kit-v1.2-overview: + +ESP32-Ethernet-Kit is an ESP32-WROVER-E based development. +For more information, check the datasheet at `ESP32-WROVER-E Datasheet`_. + +It consists of two development boards, the Ethernet Board A and the PoE +board B. The `Ethernet Board (A)`_ contains Bluetooth/Wi-Fi dual-mode +ESP32-WROVER-E module and IP101GRI, a Single Port 10/100 Fast Ethernet +Transceiver (PHY). The `PoE Board (B)`_ provides power over Ethernet +functionality. The A board can work independently, without the board B +installed. + +.. _get-started-esp32-ethernet-kit-v1.2: + +.. figure:: img/esp32-ethernet-kit-v1.2.jpg + :align: center + :alt: ESP32-Ethernet-Kit V1.2 + :figclass: align-center + + ESP32-Ethernet-Kit V1.2 + +For the application loading and monitoring, the Ethernet Board (A) also +features FTDI FT2232H chip - an advanced multi-interface USB bridge. +This chip enables to use JTAG for direct debugging of ESP32 through the +USB interface without a separate JTAG debugger. + +Hardware +******** + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +Functionality Overview +====================== + +The block diagram below shows the main components of ESP32-Ethernet-Kit +and their interconnections. + +.. figure:: img/esp32-ethernet-kit-v1.1-block-diagram.jpg + :align: center + :alt: ESP32-Ethernet-Kit block diagram + :figclass: align-center + + ESP32-Ethernet-Kit block diagram + + +Functional Description +---------------------- + +The following figures and tables describe the key components, interfaces, +and controls of the ESP32-Ethernet-Kit. + +.. _get-started-esp32-ethernet-kit-a-v1.2-layout: + + +Ethernet Board (A) +^^^^^^^^^^^^^^^^^^ + +.. figure:: img/esp32-ethernet-kit-a-v1.2-layout.jpg + :align: center + :alt: ESP32-Ethernet-Kit V1.2 + :figclass: align-center + + ESP32-Ethernet-Kit - Ethernet Board (A) layout + +The table below provides description starting from the picture's top right +corner and going clockwise. + +.. list-table:: Table 1 Component Description + :widths: 40 150 + :header-rows: 1 + + * - Key Component + - Description + * - ESP32-WROVER-E + - This ESP32 module features 64-Mbit PSRAM for flexible extended storage + and data processing capabilities. + * - GPIO Header 2 + - Five unpopulated through-hole solder pads to provide access to selected + GPIOs of ESP32. For details, see `GPIO Header 2`_. + * - Function Switch + - A 4-bit DIP switch used to configure the functionality of selected GPIOs + of ESP32. For details see `Function Switch`_. + * - Tx/Rx LEDs + - Two LEDs to show the status of UART transmission. + * - FT2232H + - The FT2232H chip serves as a multi-protocol USB-to-serial bridge which + can be programmed and controlled via USB to provide communication with + ESP32. FT2232H also features USB-to-JTAG interface which is available + on channel A of the chip, while USB-to-serial is on channel B. + The FT2232H chip enhances user-friendliness in terms of application + development and debugging. See `ESP32-Ethernet-Kit V1.2 Ethernet Board (A) Schematic`_ + * - USB Port + - USB interface. Power supply for the board as well as the communication + interface between a computer and the board. + * - Power Switch + - Power On/Off Switch. Toggling the switch to **5V0** position powers the + board on, toggling to **GND** position powers the board off. + * - 5V Input + - The 5 V power supply interface can be more convenient when the board is + operating autonomously (not connected to a computer). + * - 5V Power On LED + - This red LED turns on when power is supplied to the board, either from + USB or 5 V Input. + * - DC/DC Converter + - Provided DC 5 V to 3.3 V conversion, output current up to 2 A. + * - Board B Connectors + - A pair male and female header pins for mounting the `PoE Board (B)`_ + * - IP101GRI (PHY) + - The physical layer (PHY) connection to the Ethernet cable is + implemented using the + `IP101GRI `_ + chip. The connection between PHY and ESP32 is done through the reduced + media-independent interface (RMII), a variant of the media-independent + interface `(MII) `_ + standard. The PHY supports the IEEE 802.3/802.3u standard of 10/100 + Mbps. + * - RJ45 Port + - Ethernet network data transmission port. + * - Magnetics Module + - The Magnetics are part of the Ethernet specification to protect against + faults and transients, including rejection of common mode signals + between the transceiver IC and the cable. The magnetics also provide + galvanic isolation between the transceiver and the Ethernet device. + * - Link/Activity LEDs + - Two LEDs (green and red) that respectively indicate the "Link" and + "Activity" statuses of the PHY. + * - BOOT Button + - Download button. Holding down **BOOT** and then pressing **EN** + initiates Firmware Download mode for downloading firmware through the + serial port. + * - EN Button + - Reset button. + * - GPIO Header 1 + - This header provides six unpopulated through-hole solder pads connected + to spare GPIOs of ESP32. For details, see `GPIO Header 1`_. + +PoE Board (B) +^^^^^^^^^^^^^ + +This board coverts power delivered over the Ethernet cable (PoE) to provide a +power supply for the Ethernet Board (A). The main components of the PoE Board +(B) are shown on the block diagram under `Functionality Overview`_. + +The PoE Board (B) has the following features: + +* Support for IEEE 802.3at +* Power output: 5 V, 1.4 A + +To take advantage of the PoE functionality the **RJ45 Port** of the Ethernet +board (A) should be connected with an Ethernet cable to a switch that supports +PoE. When the Ethernet Board (A) detects 5 V power output from the PoE Board +(B), the USB power will be automatically cut off. + +.. figure:: img/esp32-ethernet-kit-b-v1.0-layout.jpg + :align: center + :alt: ESP32-Ethernet-Kit - PoE Board (B) + :figclass: align-center + + ESP32-Ethernet-Kit - PoE Board (B) layout + +.. list-table:: Table PoE Board (B) + :widths: 40 150 + :header-rows: 1 + + * - Key Component + - Description + * - Board A Connector + - Four female (left) and four male (right) header pins for connecting the + PoE Board (B) to `Ethernet Board (A)`_. The pins on the left accept + power coming from a PoE switch. The pins on the right deliver 5 V power + supply to the Ethernet Board (A). + * - External Power Terminals + - Optional power supply (26.6 ~ 54 V) to the PoE Board (B). + +.. _get-started-esp32-ethernet-kit-v1.2-setup-options: + + +Setup Options +============= + +This section describes options to configure the ESP32-Ethernet-Kit hardware. + + +Function Switch +--------------- + +When in On position, this DIP switch is routing listed GPIOs to FT2232H to +provide JTAG functionality. When in Off position, the GPIOs may be used for +other purposes. + +======= ================ +DIP SW GPIO Pin +======= ================ + 1 GPIO13 + 2 GPIO12 + 3 GPIO15 + 4 GPIO14 +======= ================ + + +RMII Clock Selection +-------------------- + +The ethernet MAC and PHY under RMII working mode need a common 50 MHz +reference clock (i.e. RMII clock) that can be provided either externally, +or generated from internal ESP32 APLL (not recommended). + +.. note:: + + For additional information on the RMII clock selection, please refer to + `ESP32-Ethernet-Kit V1.2 Ethernet Board (A) Schematic`_, sheet 2, location D2. + +RMII Clock Sourced Externally by PHY +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +By default, the ESP32-Ethernet-Kit is configured to provide RMII clock for the +IP101GRI PHY's 50M_CLKO output. The clock signal is generated by the frequency +multiplication of 25 MHz crystal connected to the PHY. For details, please see +the figure below. + +.. figure:: img/esp32-ethernet-kit-rmii-clk-from-phy.jpg + :align: center + :alt: RMII Clock from IP101GRI PHY + :figclass: align-center + + RMII Clock from IP101GRI PHY + +Please note that the PHY is reset on power up by pulling the RESET_N signal +down with a resistor. ESP32 should assert RESET_N high with GPIO5 to enable +PHY. Only this can ensure the power-up of system. Otherwise ESP32 may enter +download mode (when the clock signal of REF_CLK_50M is at a high logic level +during the GPIO0 power-up sampling phase). + + +RMII Clock Sourced Internally from ESP32's APLL +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Another option is to source the RMII Clock from internal ESP32 APLL, see +figure below. The clock signal coming from GPIO0 is first inverted, to account +for transmission line delay, and then supplied to the PHY. + +.. figure:: img/esp32-ethernet-kit-rmii-clk-to-phy.jpg + :align: center + :alt: RMII Clock from ESP Internal APLL + :figclass: align-center + + RMII Clock from ESP Internal APLL + +To implement this option, users need to remove or add some RC components on +the board. For details please refer to +`ESP32-Ethernet-Kit V1.2 Ethernet Board (A) Schematic`_, +sheet 2, location D2. Please note that if the APLL is already used for other +purposes (e.g. I2S peripheral), then you have no choice but use an external +RMII clock. + + +GPIO Allocation +--------------- + +This section describes allocation of ESP32 GPIOs to specific interfaces or +functions of the ESP32-Ethernet-Kit. + + +IP101GRI (PHY) Interface +^^^^^^^^^^^^^^^^^^^^^^^^ + +The allocation of the ESP32 (MAC) pins to IP101GRI (PHY) is shown in the table +below. Implementation of ESP32-Ethernet-Kit defaults to Reduced +Media-Independent Interface (RMII). + +==== ================ =============== +No. ESP32 Pin (MAC) IP101GRI (PHY) +==== ================ =============== +*RMII Interface* +--------------------------------------- + 1 GPIO21 TX_EN + 2 GPIO19 TXD[0] + 3 GPIO22 TXD[1] + 4 GPIO25 RXD[0] + 5 GPIO26 RXD[1] + 6 GPIO27 CRS_DV + 7 GPIO0 REF_CLK +---- ---------------- --------------- +*Serial Management Interface* +--------------------------------------- + 8 GPIO23 MDC + 9 GPIO18 MDIO +---- ---------------- --------------- +*PHY Reset* +--------------------------------------- +10 GPIO5 Reset_N +==== ================ =============== + +.. note:: + + The allocation of all pins under the ESP32's *RMII Interface* is fixed and + cannot be changed either through IO MUX or GPIO Matrix. REF_CLK can only + be selected from GPIO0, GPIO16 or GPIO17 and it can not be changed through + GPIO Matrix. + + +GPIO Header 1 +^^^^^^^^^^^^^ + +This header exposes some GPIOs that are not used elsewhere on the +ESP32-Ethernet-Kit. + +==== ================ +No. ESP32 Pin +==== ================ + 1 GPIO32 + 2 GPIO33 + 3 GPIO34 + 4 GPIO35 + 5 GPIO36 + 6 GPIO39 +==== ================ + + +GPIO Header 2 +^^^^^^^^^^^^^ + +This header contains GPIOs that may be used for other purposes depending on +scenarios described in column "Comments". + +==== ========== ==================== +No. ESP32 Pin Comments +==== ========== ==================== + 1 GPIO17 See note 1 + 2 GPIO16 See note 1 + 3 GPIO4 + 4 GPIO2 + 5 GPIO13 See note 2 + 6 GPIO12 See note 2 + 7 GPIO15 See note 2 + 8 GPIO14 See note 2 + 9 GND Ground +10 3V3 3.3 V power supply +==== ========== ==================== + +.. note:: + + 1. The ESP32 pins GPIO16 and GPIO17 are not broken out to the + ESP32-WROVER-E module and therefore not available for use. If you need + to use these pins, please solder a module without PSRAM memory inside, + e.g. the ESP32-WROOM-32D or ESP32-SOLO-1. + + 2. Functionality depends on the settings of the `Function Switch`_. + + +GPIO Allocation Summary +^^^^^^^^^^^^^^^^^^^^^^^ + +.. csv-table:: + :header: ESP32-WROVER-E,IP101GRI,UART,JTAG,GPIO,Comments + + S_VP,,,,IO36, + S_VN,,,,IO39, + IO34,,,,IO34, + IO35,,,,IO35, + IO32,,,,IO32, + IO33,,,,IO33, + IO25,RXD[0],,,, + IO26,RXD[1],,,, + IO27,CRS_DV,,,, + IO14,,,TMS,IO14, + IO12,,,TDI,IO12, + IO13,,,TCK,IO13, + IO15,,,TDO,IO15, + IO2,,,,IO2, + IO0,REF_CLK,,,,See note 1 + IO4,,,,IO4, + IO16,,,,IO16 (NC),See note 2 + IO17,,,,IO17 (NC),See note 2 + IO5,Reset_N,,,,See note 1 + IO18,MDIO,,,, + IO19,TXD[0],,,, + IO21,TX_EN,,,, + RXD0,,RXD,,, + TXD0,,TXD,,, + IO22,TXD[1],,,, + IO23,MDC,,,, + +.. note:: + + 1. To prevent the power-on state of the GPIO0 from being affected by the + clock output on the PHY side, the RESET_N signal to PHY defaults to + low, turning the clock output off. After power-on you can control + RESET_N with GPIO5 to turn the clock output on. See also + `RMII Clock Sourced Externally by PHY`_. For PHYs that cannot turn off + the clock output through RESET_N, it is recommended to use a crystal + module that can be disabled/enabled externally. Similarly like when + using RESET_N, the oscillator module should be disabled by default and + turned on by ESP32 after power-up. For a reference design please see + `ESP32-Ethernet-Kit V1.2 Ethernet Board (A) Schematic`_. + + 2. The ESP32 pins GPIO16 and GPIO17 are not broken out to the + ESP32-WROVER-E module and therefore not available for use. If you need + to use these pins, please solder a module without PSRAM memory inside, + e.g. the ESP32-WROOM-32D or ESP32-SOLO-1. + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32_ethernet_kit/esp32/procpu + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32_ethernet_kit/esp32/procpu + :goals: build + +The usual ``flash`` target will work with the ``esp32_ethernet_kit`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32_ethernet_kit/esp32/procpu + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32_ethernet_kit + +Debugging +********* + +As with much custom hardware, the ESP32 modules require patches to +OpenOCD that are not upstreamed yet. Espressif maintains their own fork of +the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_. + +The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the +``-DOPENOCD= -DOPENOCD_DEFAULT_PATH=`` +parameter when building. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32_ethernet_kit/esp32/procpu + :goals: build flash + :gen-args: -DOPENOCD= -DOPENOCD_DEFAULT_PATH= + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32_ethernet_kit/esp32/procpu + :goals: debug + + +Enabling Ethernet +***************** + +Enable Ethernet MAC, PHY and MDIO; add these to your device tree overlay: + +.. code-block:: devicetree + + ð { + status = "okay"; + }; + + &phy { + status = "okay"; + }; + + &mdio { + status = "okay"; + }; + +Enable Ethernet in KConfig: + +.. code-block:: cfg + + CONFIG_ETH_ESP32=y + CONFIG_NETWORKING=y + CONFIG_NET_L2_ETHERNET=y + +Board Init +========== + +RESET_N (GPIO5) is automatically set high to enable the Ethernet PHY +during board initialization (board_init.c) + +References +********** + +.. target-notes:: + +.. _`ESP32-Ethernet-Kit V1.2 Ethernet Board (A) Schematic`: https://dl.espressif.com/dl/schematics/SCH_ESP32-Ethernet-Kit_A_V1.2_20200528.pdf +.. _`ESP32-WROVER-E Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-wrover-e_esp32-wrover-ie_datasheet_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit-pinctrl.dtsi b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit-pinctrl.dtsi new file mode 100644 index 0000000..1b6bd6b --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit-pinctrl.dtsi @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2022-2025 Grant Ramsay + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + mdio_default: mdio_default { + group1 { + pinmux = , + ; + }; + }; + + i2s0_default: i2s0_default { + group1 { + pinmux = , + , + , + , + ; + output-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + i2s1_default: i2s1_default { + group1 { + pinmux = , + , + , + , + ; + output-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; +}; diff --git a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu.dts b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu.dts new file mode 100644 index 0000000..c4a99a6 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu.dts @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include + +/ { + model = "Espressif ESP32-Ethernet-Kit APPCPU"; + compatible = "espressif,esp32"; + + chosen { + zephyr,sram = &sram1; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; + }; +}; + +&ipm0 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; diff --git a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu.yaml b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu.yaml new file mode 100644 index 0000000..7f2f067 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu.yaml @@ -0,0 +1,27 @@ +identifier: esp32_ethernet_kit/esp32/appcpu +name: ESP32 ETHERNET KIT APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp +vendor: espressif diff --git a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu_defconfig b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu_defconfig new file mode 100644 index 0000000..4854664 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu_defconfig @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CLOCK_CONTROL=y diff --git a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.dts b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.dts new file mode 100644 index 0000000..bf2fbbd --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.dts @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2022-2025 Grant Ramsay + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include "esp32_ethernet_kit-pinctrl.dtsi" +#include + +/ { + model = "Espressif ESP32-Ethernet-Kit PROCPU"; + compatible = "espressif,esp32"; + + aliases { + uart-0 = &uart0; + watchdog0 = &wdt0; + }; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,bt-hci = &esp32_bt_hci; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&i2s0 { + pinctrl-0 = <&i2s0_default>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&i2s1 { + pinctrl-0 = <&i2s1_default>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&timer0 { + status = "okay"; +}; + +&timer1 { + status = "okay"; +}; + +&timer2 { + status = "okay"; +}; + +&timer3 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; + +&mdio { + pinctrl-0 = <&mdio_default>; + pinctrl-names = "default"; + + phy: ethernet-phy@1 { + compatible = "ethernet-phy"; + status = "disabled"; + reg = <1>; + }; +}; + +ð { + phy-handle = <&phy>; +}; + +&esp32_bt_hci { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.yaml b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.yaml new file mode 100644 index 0000000..f6fd5a5 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.yaml @@ -0,0 +1,14 @@ +identifier: esp32_ethernet_kit/esp32/procpu +name: ESP32 ETHERNET KIT PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - gpio + - watchdog + - uart + - nvs + - pwm + - i2s +vendor: espressif diff --git a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu_defconfig b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu_defconfig new file mode 100644 index 0000000..e192c24 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu_defconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y + +CONFIG_GPIO=y diff --git a/boards/espressif/esp32_ethernet_kit/support/openocd.cfg b/boards/espressif/esp32_ethernet_kit/support/openocd.cfg new file mode 100644 index 0000000..338e6e4 --- /dev/null +++ b/boards/espressif/esp32_ethernet_kit/support/openocd.cfg @@ -0,0 +1,5 @@ +set ESP_RTOS none +set ESP32_ONLYCPU 1 + +source [find interface/ftdi/esp32_devkitj_v1.cfg] +source [find target/esp32.cfg] diff --git a/boards/espressif/esp32c3_devkitc/Kconfig b/boards/espressif/esp32c3_devkitc/Kconfig new file mode 100644 index 0000000..c6a99b1 --- /dev/null +++ b/boards/espressif/esp32c3_devkitc/Kconfig @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 diff --git a/boards/espressif/esp32c3_devkitc/Kconfig.esp32c3_devkitc b/boards/espressif/esp32c3_devkitc/Kconfig.esp32c3_devkitc new file mode 100644 index 0000000..7e57441 --- /dev/null +++ b/boards/espressif/esp32c3_devkitc/Kconfig.esp32c3_devkitc @@ -0,0 +1,7 @@ +# ESP32C3 devkitc board configuration + +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32C3_DEVKITC + select SOC_ESP32C3_WROOM_02_N4 diff --git a/boards/espressif/esp32c3_devkitc/Kconfig.sysbuild b/boards/espressif/esp32c3_devkitc/Kconfig.sysbuild new file mode 100644 index 0000000..8d3acb9 --- /dev/null +++ b/boards/espressif/esp32c3_devkitc/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp32c3_devkitc/board.cmake b/boards/espressif/esp32c3_devkitc/board.cmake new file mode 100644 index 0000000..2f04d1f --- /dev/null +++ b/boards/espressif/esp32c3_devkitc/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp32c3_devkitc/board.yml b/boards/espressif/esp32c3_devkitc/board.yml new file mode 100644 index 0000000..5f12268 --- /dev/null +++ b/boards/espressif/esp32c3_devkitc/board.yml @@ -0,0 +1,6 @@ +board: + name: esp32c3_devkitc + full_name: ESP32-C3-DevKitC + vendor: espressif + socs: + - name: esp32c3 diff --git a/boards/espressif/esp32c3_devkitc/doc/img/esp32c3_devkitc.webp b/boards/espressif/esp32c3_devkitc/doc/img/esp32c3_devkitc.webp new file mode 100644 index 0000000..5f2dc9e Binary files /dev/null and b/boards/espressif/esp32c3_devkitc/doc/img/esp32c3_devkitc.webp differ diff --git a/boards/espressif/esp32c3_devkitc/doc/index.rst b/boards/espressif/esp32c3_devkitc/doc/index.rst new file mode 100644 index 0000000..eae08a6 --- /dev/null +++ b/boards/espressif/esp32c3_devkitc/doc/index.rst @@ -0,0 +1,219 @@ +.. zephyr:board:: esp32c3_devkitc + +Overview +******** + +ESP32-C3-DevKitC-02 is an entry-level development board based on ESP32-C3-WROOM-02, +a general-purpose module with 4 MB SPI flash. This board integrates complete Wi-Fi and Bluetooth® Low Energy functions. +For more information, check `ESP32-C3-DevKitC`_. + +Hardware +******** + +ESP32-C3 is a single-core Wi-Fi and Bluetooth 5 (LE) microcontroller SoC, +based on the open-source RISC-V architecture. It strikes the right balance of power, +I/O capabilities and security, thus offering the optimal cost-effective +solution for connected devices. +The availability of Wi-Fi and Bluetooth 5 (LE) connectivity not only makes the device configuration easy, +but it also facilitates a variety of use-cases based on dual connectivity. + +The features include the following: + +- 32-bit core RISC-V microcontroller with a maximum clock speed of 160 MHz +- 400 KB of internal RAM +- 802.11b/g/n/e/i +- A Bluetooth LE subsystem that supports features of Bluetooth 5 and Bluetooth Mesh +- Various peripherals: + + - 12-bit ADC with up to 6 channels + - TWAI compatible with CAN bus 2.0 + - Temperature sensor + - 3x SPI + - 1x I2S + - 1x I2C + - 2x UART + - LED PWM with up to 6 channels + +- Cryptographic hardware acceleration (RNG, ECC, RSA, SHA-2, AES) + +For more information, check the datasheet at `ESP32-C3 Datasheet`_ or the technical reference +manual at `ESP32-C3 Technical Reference Manual`_. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32c3_devkitc + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_devkitc + :goals: build + +The usual ``flash`` target will work with the ``esp32c3_devkitc`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_devkitc + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32c3_devkitc + +Debugging +********* + +As with much custom hardware, the ESP32-C3 modules require patches to +OpenOCD that are not upstreamed yet. Espressif maintains their own fork of +the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_. + +The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the +``-DOPENOCD= -DOPENOCD_DEFAULT_PATH=`` +parameter when building. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_devkitc + :goals: build flash + :gen-args: -DOPENOCD= -DOPENOCD_DEFAULT_PATH= + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_devkitc + :goals: debug + +References +********** + +.. target-notes:: + +.. _`ESP32-C3-DevKitC`: https://docs.espressif.com/projects/esp-dev-kits/en/latest/esp32c3/esp32-c3-devkitc-02/index.html +.. _`ESP32-C3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf +.. _`ESP32-C3 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/espressif/esp32c3_devkitc/esp32c3_devkitc-pinctrl.dtsi b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc-pinctrl.dtsi new file mode 100644 index 0000000..f6add95 --- /dev/null +++ b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc-pinctrl.dtsi @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + twai_default: twai_default { + group1 { + pinmux = , + ; + }; + }; +}; diff --git a/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.dts b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.dts new file mode 100644 index 0000000..ec61f30 --- /dev/null +++ b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.dts @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "esp32c3_devkitc-pinctrl.dtsi" +#include +#include + +/ { + model = "Espressif ESP32C3-DevkitC"; + compatible = "espressif,esp32c3"; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,bt-hci = &esp32_bt_hci; + }; + + aliases { + sw0 = &user_button1; + i2c-0 = &i2c0; + watchdog0 = &wdt0; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button1: button_1 { + label = "User SW1"; + gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&usb_serial { + /* requires resoldering of resistors on the board */ + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&trng0 { + status = "okay"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&timer0 { + status = "disabled"; +}; + +&timer1 { + status = "disabled"; +}; + +&twai { + /* requires external CAN transceiver or jumper on RX and TX pins for loopback testing */ + status = "disabled"; + pinctrl-0 = <&twai_default>; + pinctrl-names = "default"; +}; + +&esp32_bt_hci { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.yaml b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.yaml new file mode 100644 index 0000000..f2b98e3 --- /dev/null +++ b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.yaml @@ -0,0 +1,18 @@ +identifier: esp32c3_devkitc +name: ESP32-C3 +type: mcu +arch: riscv +toolchain: + - zephyr +supported: + - adc + - gpio + - i2c + - watchdog + - uart + - dma + - pwm + - spi + - counter + - entropy +vendor: espressif diff --git a/boards/espressif/esp32c3_devkitc/esp32c3_devkitc_defconfig b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc_defconfig new file mode 100644 index 0000000..187793c --- /dev/null +++ b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc_defconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y diff --git a/boards/espressif/esp32c3_devkitc/support/openocd.cfg b/boards/espressif/esp32c3_devkitc/support/openocd.cfg new file mode 100644 index 0000000..92a792f --- /dev/null +++ b/boards/espressif/esp32c3_devkitc/support/openocd.cfg @@ -0,0 +1,11 @@ +set ESP_RTOS none + +# ESP32C3 has built-in JTAG interface over USB port in pins GPIO18/GPIO19 (D-/D+). +# Uncomment the line below to enable USB debugging. +# source [find interface/esp_usb_jtag.cfg] + +# Otherwise, use external JTAG programmer as ESP-Prog +source [find interface/ftdi/esp32_devkitj_v1.cfg] + +source [find target/esp32c3.cfg] +adapter speed 5000 diff --git a/boards/espressif/esp32c3_devkitm/Kconfig b/boards/espressif/esp32c3_devkitm/Kconfig new file mode 100644 index 0000000..c6a99b1 --- /dev/null +++ b/boards/espressif/esp32c3_devkitm/Kconfig @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 diff --git a/boards/espressif/esp32c3_devkitm/Kconfig.esp32c3_devkitm b/boards/espressif/esp32c3_devkitm/Kconfig.esp32c3_devkitm new file mode 100644 index 0000000..854b994 --- /dev/null +++ b/boards/espressif/esp32c3_devkitm/Kconfig.esp32c3_devkitm @@ -0,0 +1,7 @@ +# ESP32C3 devkitm board configuration + +# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32C3_DEVKITM + select SOC_ESP32C3_MINI_N4 diff --git a/boards/espressif/esp32c3_devkitm/Kconfig.sysbuild b/boards/espressif/esp32c3_devkitm/Kconfig.sysbuild new file mode 100644 index 0000000..3a2d17a --- /dev/null +++ b/boards/espressif/esp32c3_devkitm/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp32c3_devkitm/board.cmake b/boards/espressif/esp32c3_devkitm/board.cmake new file mode 100644 index 0000000..2f04d1f --- /dev/null +++ b/boards/espressif/esp32c3_devkitm/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp32c3_devkitm/board.yml b/boards/espressif/esp32c3_devkitm/board.yml new file mode 100644 index 0000000..90bd85d --- /dev/null +++ b/boards/espressif/esp32c3_devkitm/board.yml @@ -0,0 +1,6 @@ +board: + name: esp32c3_devkitm + full_name: ESP32-C3-DevKitM + vendor: espressif + socs: + - name: esp32c3 diff --git a/boards/espressif/esp32c3_devkitm/doc/img/esp32c3_devkitm.webp b/boards/espressif/esp32c3_devkitm/doc/img/esp32c3_devkitm.webp new file mode 100644 index 0000000..d282642 Binary files /dev/null and b/boards/espressif/esp32c3_devkitm/doc/img/esp32c3_devkitm.webp differ diff --git a/boards/espressif/esp32c3_devkitm/doc/index.rst b/boards/espressif/esp32c3_devkitm/doc/index.rst new file mode 100644 index 0000000..d4fcb4e --- /dev/null +++ b/boards/espressif/esp32c3_devkitm/doc/index.rst @@ -0,0 +1,219 @@ +.. zephyr:board:: esp32c3_devkitm + +Overview +******** + +ESP32-C3-DevKitM is an entry-level development board based on ESP32-C3-MINI-1, +a module named for its small size. This board integrates complete Wi-Fi and Bluetooth® Low Energy functions. +For more information, check `ESP32-C3-DevKitM`_. + +Hardware +******** + +ESP32-C3 is a single-core Wi-Fi and Bluetooth 5 (LE) microcontroller SoC, +based on the open-source RISC-V architecture. It strikes the right balance of power, +I/O capabilities and security, thus offering the optimal cost-effective +solution for connected devices. +The availability of Wi-Fi and Bluetooth 5 (LE) connectivity not only makes the device configuration easy, +but it also facilitates a variety of use-cases based on dual connectivity. + +The features include the following: + +- 32-bit core RISC-V microcontroller with a maximum clock speed of 160 MHz +- 400 KB of internal RAM +- 802.11b/g/n/e/i +- A Bluetooth LE subsystem that supports features of Bluetooth 5 and Bluetooth Mesh +- Various peripherals: + + - 12-bit ADC with up to 6 channels + - TWAI compatible with CAN bus 2.0 + - Temperature sensor + - 3x SPI + - 1x I2S + - 1x I2C + - 2x UART + - LED PWM with up to 6 channels + +- Cryptographic hardware acceleration (RNG, ECC, RSA, SHA-2, AES) + +For more information, check the datasheet at `ESP32-C3 Datasheet`_ or the technical reference +manual at `ESP32-C3 Technical Reference Manual`_. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32c3_devkitm + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_devkitm + :goals: build + +The usual ``flash`` target will work with the ``esp32c3_devkitm`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_devkitm + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32c3_devkitm + +Debugging +********* + +As with much custom hardware, the ESP32-C3 modules require patches to +OpenOCD that are not upstreamed yet. Espressif maintains their own fork of +the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_. + +The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the +``-DOPENOCD= -DOPENOCD_DEFAULT_PATH=`` +parameter when building. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_devkitm + :goals: build flash + :gen-args: -DOPENOCD= -DOPENOCD_DEFAULT_PATH= + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_devkitm + :goals: debug + +References +********** + +.. target-notes:: + +.. _`ESP32-C3-DevKitM`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32c3/hw-reference/esp32c3/user-guide-devkitm-1.html +.. _`ESP32-C3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf +.. _`ESP32-C3 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/espressif/esp32c3_devkitm/esp32c3_devkitm-pinctrl.dtsi b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm-pinctrl.dtsi new file mode 100644 index 0000000..1e97415 --- /dev/null +++ b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm-pinctrl.dtsi @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + i2s_default: i2s_default { + group1 { + pinmux = , + , + , + ; + output-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + twai_default: twai_default { + group1 { + pinmux = , + ; + }; + }; +}; diff --git a/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.dts b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.dts new file mode 100644 index 0000000..2e1b41e --- /dev/null +++ b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.dts @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "esp32c3_devkitm-pinctrl.dtsi" +#include +#include + +/ { + model = "Espressif ESP32C3-DevkitM"; + compatible = "espressif,esp32c3"; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,bt-hci = &esp32_bt_hci; + }; + + aliases { + sw0 = &user_button1; + i2c-0 = &i2c0; + watchdog0 = &wdt0; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button1: button_1 { + label = "User SW1"; + gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&usb_serial { + /* requires resoldering of resistors on the board */ + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&i2s { + pinctrl-0 = <&i2s_default>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&trng0 { + status = "okay"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&timer0 { + status = "disabled"; +}; + +&timer1 { + status = "disabled"; +}; + +&twai { + /* requires external CAN transceiver or jumper on RX and TX pins for loopback testing */ + status = "disabled"; + pinctrl-0 = <&twai_default>; + pinctrl-names = "default"; +}; + +&esp32_bt_hci { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.yaml b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.yaml new file mode 100644 index 0000000..3815389 --- /dev/null +++ b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.yaml @@ -0,0 +1,19 @@ +identifier: esp32c3_devkitm +name: ESP32-C3 +type: mcu +arch: riscv +toolchain: + - zephyr +supported: + - adc + - gpio + - i2c + - i2s + - watchdog + - uart + - dma + - pwm + - spi + - counter + - entropy +vendor: espressif diff --git a/boards/espressif/esp32c3_devkitm/esp32c3_devkitm_defconfig b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm_defconfig new file mode 100644 index 0000000..187793c --- /dev/null +++ b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm_defconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y diff --git a/boards/espressif/esp32c3_devkitm/support/openocd.cfg b/boards/espressif/esp32c3_devkitm/support/openocd.cfg new file mode 100644 index 0000000..92a792f --- /dev/null +++ b/boards/espressif/esp32c3_devkitm/support/openocd.cfg @@ -0,0 +1,11 @@ +set ESP_RTOS none + +# ESP32C3 has built-in JTAG interface over USB port in pins GPIO18/GPIO19 (D-/D+). +# Uncomment the line below to enable USB debugging. +# source [find interface/esp_usb_jtag.cfg] + +# Otherwise, use external JTAG programmer as ESP-Prog +source [find interface/ftdi/esp32_devkitj_v1.cfg] + +source [find target/esp32c3.cfg] +adapter speed 5000 diff --git a/boards/espressif/esp32c3_rust/Kconfig b/boards/espressif/esp32c3_rust/Kconfig new file mode 100644 index 0000000..c6a99b1 --- /dev/null +++ b/boards/espressif/esp32c3_rust/Kconfig @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 diff --git a/boards/espressif/esp32c3_rust/Kconfig.esp32c3_rust b/boards/espressif/esp32c3_rust/Kconfig.esp32c3_rust new file mode 100644 index 0000000..1b5be57 --- /dev/null +++ b/boards/espressif/esp32c3_rust/Kconfig.esp32c3_rust @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32C3_RUST + select SOC_ESP32C3_MINI_N4 diff --git a/boards/espressif/esp32c3_rust/Kconfig.sysbuild b/boards/espressif/esp32c3_rust/Kconfig.sysbuild new file mode 100644 index 0000000..8d3acb9 --- /dev/null +++ b/boards/espressif/esp32c3_rust/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp32c3_rust/board.cmake b/boards/espressif/esp32c3_rust/board.cmake new file mode 100644 index 0000000..91581df --- /dev/null +++ b/boards/espressif/esp32c3_rust/board.cmake @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp32c3_rust/board.yml b/boards/espressif/esp32c3_rust/board.yml new file mode 100644 index 0000000..b8beeef --- /dev/null +++ b/boards/espressif/esp32c3_rust/board.yml @@ -0,0 +1,9 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +board: + name: esp32c3_rust + full_name: ESP32-C3-DevKit-RUST + vendor: espressif + socs: + - name: esp32c3 diff --git a/boards/espressif/esp32c3_rust/doc/img/esp32c3_rust.webp b/boards/espressif/esp32c3_rust/doc/img/esp32c3_rust.webp new file mode 100644 index 0000000..aba51b8 Binary files /dev/null and b/boards/espressif/esp32c3_rust/doc/img/esp32c3_rust.webp differ diff --git a/boards/espressif/esp32c3_rust/doc/index.rst b/boards/espressif/esp32c3_rust/doc/index.rst new file mode 100644 index 0000000..144b694 --- /dev/null +++ b/boards/espressif/esp32c3_rust/doc/index.rst @@ -0,0 +1,264 @@ +.. zephyr:board:: esp32c3_rust + +Overview +******** + +ESP32-C3-DevKit-RUST is based on the ESP32-C3, a single-core Wi-Fi and Bluetooth 5 (LE) microcontroller SoC, +based on the open-source RISC-V architecture. This special board also includes the ESP32-C3-MINI-1 module, +a 6DoF IMU, a temperature and humidity sensor, a Li-Ion battery charger, and a Type-C USB. The board is designed +to be easily used in training sessions, demonstrating its capabilities with all the board peripherals. +For more information, check `ESP32-C3-DevKit-RUST`_. + +Hardware +******** + +SoC Features: + +- IEEE 802.11 b/g/n-compliant +- Bluetooth 5, Bluetooth mesh +- 32-bit RISC-V single-core processor, up to 160MHz +- 384 KB ROM +- 400 KB SRAM (16 KB for cache) +- 8 KB SRAM in RTC +- 22 x programmable GPIOs +- 3 x SPI +- 2 x UART +- 1 x I2C +- 1 x I2S +- 2 x 54-bit general-purpose timers +- 3 x watchdog timers +- 1 x 52-bit system timer +- Remote Control Peripheral (RMT) +- LED PWM controller (LEDC) +- Full-speed USB Serial/JTAG controller +- General DMA controller (GDMA) +- 1 x TWAI® +- 2 x 12-bit SAR ADCs, up to 6 channels +- 1 x temperature sensor + +For more information, check the datasheet at `ESP32-C3 Datasheet`_ or the technical reference +manual at `ESP32-C3 Technical Reference Manual`_. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +I2C Peripherals +=============== + +This board includes the following peripherals over the I2C bus: + ++---------------------------+--------------+---------+ +| Peripheral | Part number | Address | ++===========================+==============+=========+ +| IMU | ICM-42670-P | 0x68 | ++---------------------------+--------------+---------+ +| Temperature and Humidity | SHTC3 | 0x70 | ++---------------------------+--------------+---------+ + +I2C Bus Connection +================== + ++---------+--------+ +| Signal | GPIO | ++=========+========+ +| SDA | GPIO10 | ++---------+--------+ +| SCL | GPIO8 | ++---------+--------+ + +I/Os +==== + +The following devices are connected through GPIO: + ++--------------+--------+ +| I/O Devices | GPIO | ++==============+========+ +| WS2812 LED | GPIO2 | ++--------------+--------+ +| LED | GPIO7 | ++--------------+--------+ +| Button/Boot | GPIO9 | ++--------------+--------+ + +Power +===== + +* USB type-C (*no PD compatibility*). +* Li-Ion battery charger. + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32c3_rust + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_rust + :goals: build + +The usual ``flash`` target will work with the ``esp32c3_rust`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_rust + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32c3_rust + +Debugging +********* + +As with much custom hardware, the ESP32-C3 modules require patches to +OpenOCD that are not upstreamed yet. Espressif maintains their own fork of +the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_. + +The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the +``-DOPENOCD= -DOPENOCD_DEFAULT_PATH=`` +parameter when building. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_rust + :goals: build flash + :gen-args: -DOPENOCD= -DOPENOCD_DEFAULT_PATH= + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_rust + :goals: debug + +References +********** + +.. target-notes:: + +.. _`ESP32-C3-DevKit-RUST`: https://github.com/esp-rs/esp-rust-board/tree/v1.2 +.. _`ESP32-C3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf +.. _`ESP32-C3 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/espressif/esp32c3_rust/esp32c3_rust-pinctrl.dtsi b/boards/espressif/esp32c3_rust/esp32c3_rust-pinctrl.dtsi new file mode 100644 index 0000000..b1e14c2 --- /dev/null +++ b/boards/espressif/esp32c3_rust/esp32c3_rust-pinctrl.dtsi @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; +}; diff --git a/boards/espressif/esp32c3_rust/esp32c3_rust.dts b/boards/espressif/esp32c3_rust/esp32c3_rust.dts new file mode 100644 index 0000000..9c931e9 --- /dev/null +++ b/boards/espressif/esp32c3_rust/esp32c3_rust.dts @@ -0,0 +1,134 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "esp32c3_rust-pinctrl.dtsi" +#include +#include +#include + +/ { + model = "Espressif ESP32C3-RUST"; + compatible = "espressif,esp32c3_rust"; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &usb_serial; + zephyr,shell-uart = &usb_serial; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + aliases { + led0 = &red_led_0; + sw0 = &user_button1; + i2c-0 = &i2c0; + watchdog0 = &wdt0; + led-strip = &led_strip; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button1: button_1 { + label = "User SW1"; + gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + red_led_0: led_0 { + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + label = "User LD0"; + }; + }; + +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; + + /* Workaround to support WS2812 driver */ + line-idle-low; + status = "okay"; + + led_strip: ws2812@0 { + compatible = "worldsemi,ws2812-spi"; + + /* SPI */ + reg = <0>; /* ignored, but necessary for SPI bindings */ + spi-max-frequency = <6400000>; + + /* WS2812 */ + chain-length = <1>; /* arbitrary; change at will */ + spi-cpha; + spi-one-frame = <0xf0>; /* 11110000: 625 ns high and 625 ns low */ + spi-zero-frame = <0xc0>; /* 11000000: 312.5 ns high and 937.5 ns low */ + color-mapping = ; + }; +}; + +&usb_serial { + status = "okay"; +}; + + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; + + icm42670@68 { + compatible = "invensense,icm42670"; + reg = <0x68>; + status = "okay"; + accel-hz = <800>; + accel-fs = <16>; + gyro-hz = <800>; + gyro-fs = <2000>; + }; + + shtc3@70 { + compatible = "sensirion,shtc3", "sensirion,shtcx"; + reg = <0x70>; + measure-mode = "normal"; + clock-stretching; + }; +}; + +&trng0 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&uart0 { + status = "disabled"; +}; + +&esp32_bt_hci { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp32c3_rust/esp32c3_rust.yaml b/boards/espressif/esp32c3_rust/esp32c3_rust.yaml new file mode 100644 index 0000000..a825523 --- /dev/null +++ b/boards/espressif/esp32c3_rust/esp32c3_rust.yaml @@ -0,0 +1,21 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +identifier: esp32c3_rust +name: ESP32-C3-DevKit-RUST-1 +type: mcu +arch: riscv +toolchain: + - zephyr +supported: + - adc + - gpio + - i2c + - watchdog + - uart + - dma + - pwm + - spi + - counter + - entropy +vendor: espressif diff --git a/boards/espressif/esp32c3_rust/esp32c3_rust_defconfig b/boards/espressif/esp32c3_rust/esp32c3_rust_defconfig new file mode 100644 index 0000000..147089f --- /dev/null +++ b/boards/espressif/esp32c3_rust/esp32c3_rust_defconfig @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y +CONFIG_I2C=y +CONFIG_LED_STRIP=y +CONFIG_SENSOR=y diff --git a/boards/espressif/esp32c3_rust/support/openocd.cfg b/boards/espressif/esp32c3_rust/support/openocd.cfg new file mode 100644 index 0000000..e846c96 --- /dev/null +++ b/boards/espressif/esp32c3_rust/support/openocd.cfg @@ -0,0 +1,11 @@ +set ESP_RTOS none + +# ESP32C3 has built-in JTAG interface over USB port in pins GPIO18/GPIO19 (D-/D+). +# Uncomment the line below to enable USB debugging. +source [find interface/esp_usb_jtag.cfg] + +# Otherwise, use external JTAG programmer as ESP-Prog +source [find interface/ftdi/esp32_devkitj_v1.cfg] + +source [find target/esp32c3.cfg] +adapter speed 5000 diff --git a/boards/espressif/esp32c6_devkitc/Kconfig b/boards/espressif/esp32c6_devkitc/Kconfig new file mode 100644 index 0000000..e24ba97 --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/Kconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_ESP32C6_DEVKITC_ESP32C6_HPCORE + default 256 if BOARD_ESP32C6_DEVKITC_ESP32C6_LPCORE diff --git a/boards/espressif/esp32c6_devkitc/Kconfig.esp32c6_devkitc b/boards/espressif/esp32c6_devkitc/Kconfig.esp32c6_devkitc new file mode 100644 index 0000000..9b30251 --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/Kconfig.esp32c6_devkitc @@ -0,0 +1,9 @@ +# ESP32C6 devkitc board configuration + +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32C6_DEVKITC + select SOC_ESP32_C6_WROOM_1U_N8 + select SOC_ESP32C6_HPCORE if BOARD_ESP32C6_DEVKITC_ESP32C6_HPCORE + select SOC_ESP32C6_LPCORE if BOARD_ESP32C6_DEVKITC_ESP32C6_LPCORE diff --git a/boards/espressif/esp32c6_devkitc/Kconfig.sysbuild b/boards/espressif/esp32c6_devkitc/Kconfig.sysbuild new file mode 100644 index 0000000..3a2d17a --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp32c6_devkitc/board.cmake b/boards/espressif/esp32c6_devkitc/board.cmake new file mode 100644 index 0000000..2f04d1f --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp32c6_devkitc/board.yml b/boards/espressif/esp32c6_devkitc/board.yml new file mode 100644 index 0000000..485d35b --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/board.yml @@ -0,0 +1,6 @@ +board: + name: esp32c6_devkitc + full_name: ESP32-C6-DevKitC + vendor: espressif + socs: + - name: esp32c6 diff --git a/boards/espressif/esp32c6_devkitc/doc/img/esp32c6_devkitc.webp b/boards/espressif/esp32c6_devkitc/doc/img/esp32c6_devkitc.webp new file mode 100644 index 0000000..3b16025 Binary files /dev/null and b/boards/espressif/esp32c6_devkitc/doc/img/esp32c6_devkitc.webp differ diff --git a/boards/espressif/esp32c6_devkitc/doc/index.rst b/boards/espressif/esp32c6_devkitc/doc/index.rst new file mode 100644 index 0000000..ee0f04a --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/doc/index.rst @@ -0,0 +1,285 @@ +.. zephyr:board:: esp32c6_devkitc + +Overview +******** + +ESP32-C6-DevKitC is an entry-level development board based on ESP32-C6-WROOM-1(U), +a general-purpose module with a 8 MB SPI flash. This board integrates complete Wi-Fi, +Bluetooth LE, Zigbee, and Thread functions. For more information, check `ESP32-C6-DevKitC`_. + +Hardware +******** + +ESP32-C6 is Espressif's first Wi-Fi 6 SoC integrating 2.4 GHz Wi-Fi 6, Bluetooth 5.3 (LE) and the +802.15.4 protocol. ESP32-C6 achieves an industry-leading RF performance, with reliable security +features and multiple memory resources for IoT products. +It consists of a high-performance (HP) 32-bit RISC-V processor, which can be clocked up to 160 MHz, +and a low-power (LP) 32-bit RISC-V processor, which can be clocked up to 20 MHz. +It has a 320KB ROM, a 512KB SRAM, and works with external flash. + +ESP32-C6-DevKitC is an entry-level development board based on ESP32-C6-WROOM-1(U), +a general-purpose module with a 8 MB SPI flash. + +Most of the I/O pins are broken out to the pin headers on both sides for easy interfacing. +Developers can either connect peripherals with jumper wires or mount ESP32-C6-DevKitC on +a breadboard. + +ESP32-C6 includes the following features: + +- 32-bit core RISC-V microcontroller with a clock speed of up to 160 MHz +- 400 KB of internal RAM +- WiFi 802.11 ax 2.4GHz +- Fully compatible with IEEE 802.11b/g/n protocol +- Bluetooth LE: Bluetooth 5.3 certified +- Internal co-existence mechanism between Wi-Fi and Bluetooth to share the same antenna +- IEEE 802.15.4 (Zigbee and Thread) + +Digital interfaces: + +- 30x GPIOs (QFN40), or 22x GPIOs (QFN32) +- 2x UART +- 1x Low-power (LP) UART +- 1x General purpose SPI +- 1x I2C +- 1x Low-power (LP) I2C +- 1x I2S +- 1x Pulse counter +- 1x USB Serial/JTAG controller +- 1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0) +- 1x SDIO 2.0 slave controller +- LED PWM controller, up to 6 channels +- 1x Motor control PWM (MCPWM) +- 1x Remote control peripehral +- 1x Parallel IO interface (PARLIO) +- General DMA controller (GDMA), with 3 transmit channels and 3 receive channels +- Event task matrix (ETM) + +Analog interfaces: + +- 1x 12-bit SAR ADCs, up to 7 channels +- 1x temperature sensor + +Timers: + +- 1x 52-bit system timer +- 1x 54-bit general-purpose timers +- 3x Watchdog timers +- 1x Analog watchdog timer + +Low Power: + +- Four power modes designed for typical scenarios: Active, Modem-sleep, Light-sleep, Deep-sleep + +Security: + +- Secure boot +- Flash encryption +- 4-Kbit OTP, up to 1792 bits for users +- Cryptographic hardware acceleration: (AES-128/256, ECC, HMAC, RSA, SHA, Digital signature, Hash) +- Random number generator (RNG) + +For more information, check the datasheet at `ESP32-C6 Datasheet`_ or the technical reference +manual at `ESP32-C6 Technical Reference Manual`_. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the EPS32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32c6_devkitc/esp32c6/hpcore + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │   └── zephyr + │   ├── zephyr.elf + │   └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c6_devkitc/esp32c6/hpcore + :goals: build + +The usual ``flash`` target will work with the ``esp32c6_devkitc`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c6_devkitc/esp32c6/hpcore + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32c6_devkitc/esp32c6/hpcore + +Debugging +********* + +As with much custom hardware, the ESP32-C6 modules require patches to +OpenOCD that are not upstreamed yet. Espressif maintains their own fork of +the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_. + +The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the +``-DOPENOCD= -DOPENOCD_DEFAULT_PATH=`` +parameter when building. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c6_devkitc/esp32c6/hpcore + :goals: build flash + :gen-args: -DOPENOCD= -DOPENOCD_DEFAULT_PATH= + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c6_devkitc/esp32c6/hpcore + :goals: debug + +Low-Power CPU (LP CORE) +*********************** + +The ESP32-C6 SoC has two RISC-V cores: the High-Performance Core (HP CORE) and the Low-Power Core (LP CORE). +The LP Core features ultra low power consumption, an interrupt controller, a debug module and a system bus +interface for memory and peripheral access. + +The LP Core is in sleep mode by default. It has two application scenarios: + +- Power insensitive scenario: When the High-Performance CPU (HP Core) is active, the LP Core can assist the HP CPU with some speed and efficiency-insensitive controls and computations. +- Power sensitive scenario: When the HP CPU is in the power-down state to save power, the LP Core can be woken up to handle some external wake-up events. + +For more information, check the datasheet at `ESP32-C6 Datasheet`_ or the technical reference +manual at `ESP32-C6 Technical Reference Manual`_. + +The LP Core support is fully integrated with :ref:`sysbuild`. The user can enable the LP Core by adding +the following configuration to the project: + +.. code:: cfg + + CONFIG_ULP_COPROC_ENABLED=y + +See :zephyr:code-sample-category:`lp-core` folder as code reference. + +References +********** + +.. target-notes:: + +.. _`ESP32-C6-DevKitC`: https://docs.espressif.com/projects/esp-dev-kits/en/latest/esp32c6/esp32-c6-devkitc-1/user_guide.html +.. _`ESP32-C6 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-c6_datasheet_en.pdf +.. _`ESP32-C6 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-c6_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore-pinctrl.dtsi b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore-pinctrl.dtsi new file mode 100644 index 0000000..5265d5e --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore-pinctrl.dtsi @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; +}; diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore.dts b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore.dts new file mode 100644 index 0000000..ef8dbea --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore.dts @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "esp32c6_devkitc_hpcore-pinctrl.dtsi" +#include +#include + +/ { + model = "esp32c6_devkitc HP Core"; + compatible = "espressif,esp32c6"; + + chosen { + zephyr,sram = &sramhp; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + aliases { + sw0 = &user_button1; + watchdog0 = &wdt0; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button1: button_1 { + label = "User SW1"; + gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&trng0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore.yaml b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore.yaml new file mode 100644 index 0000000..4bc3c0c --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore.yaml @@ -0,0 +1,22 @@ +identifier: esp32c6_devkitc/esp32c6/hpcore +name: ESP32-C6-DevKitC HP Core +vendor: espressif +type: mcu +arch: riscv +toolchain: + - zephyr +supported: + - adc + - gpio + - watchdog + - uart + - dma + - pwm + - spi + - counter + - entropy + - i2c + - i2s +testing: + ignore_tags: + - bluetooth diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore_defconfig b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore_defconfig new file mode 100644 index 0000000..187793c --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_hpcore_defconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore.dts b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore.dts new file mode 100644 index 0000000..739781e --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore.dts @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include + +/ { + model = "Espressif ESP32C6-DevkitC LPCORE"; + compatible = "espressif,esp32c6"; + + chosen { + zephyr,sram = &sramlp; + zephyr,code-partition = &slot0_lpcore_partition; + zephyr,console = &lp_uart; + zephyr,shell-uart = &lp_uart; + }; +}; + +&lp_uart { + status = "okay"; + current-speed = <115200>; +}; diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore.yaml b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore.yaml new file mode 100644 index 0000000..49e25bc --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore.yaml @@ -0,0 +1,19 @@ +identifier: esp32c6_devkitc/esp32c6/lpcore +name: ESP32-C6-DevKitC LP Core +type: mcu +arch: riscv +toolchain: + - zephyr +supported: + - cpu + - uart + - serial +testing: + only_tags: + - introduction + ignore_tags: + - kernel + - posix + - chre + - cpp +vendor: espressif diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore_defconfig b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore_defconfig new file mode 100644 index 0000000..0497409 --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc_lpcore_defconfig @@ -0,0 +1,20 @@ +# Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +# Memory protection +CONFIG_THREAD_STACK_INFO=n +CONFIG_THREAD_CUSTOM_DATA=n + +# Boot +CONFIG_BOOT_BANNER=n + +# Console +CONFIG_SERIAL=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_PRINTK=n +CONFIG_CBPRINTF_NANO=y + +# Build +CONFIG_SIZE_OPTIMIZATIONS=y +CONFIG_BUSYWAIT_CPU_LOOPS_PER_USEC=4 diff --git a/boards/espressif/esp32c6_devkitc/support/openocd.cfg b/boards/espressif/esp32c6_devkitc/support/openocd.cfg new file mode 100644 index 0000000..d86a551 --- /dev/null +++ b/boards/espressif/esp32c6_devkitc/support/openocd.cfg @@ -0,0 +1,4 @@ +# ESP32C6 has built-in JTAG interface over USB port in pins GPIO13/GPIO12 (D-/D+). +set ESP_RTOS none + +source [find board/esp32c6-builtin.cfg] diff --git a/boards/espressif/esp32s2_devkitc/Kconfig b/boards/espressif/esp32s2_devkitc/Kconfig new file mode 100644 index 0000000..c6a99b1 --- /dev/null +++ b/boards/espressif/esp32s2_devkitc/Kconfig @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 diff --git a/boards/espressif/esp32s2_devkitc/Kconfig.esp32s2_devkitc b/boards/espressif/esp32s2_devkitc/Kconfig.esp32s2_devkitc new file mode 100644 index 0000000..97dca60 --- /dev/null +++ b/boards/espressif/esp32s2_devkitc/Kconfig.esp32s2_devkitc @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32S2_DEVKITC + select SOC_ESP32S2_SOLO_N4R2 diff --git a/boards/espressif/esp32s2_devkitc/Kconfig.sysbuild b/boards/espressif/esp32s2_devkitc/Kconfig.sysbuild new file mode 100644 index 0000000..8d3acb9 --- /dev/null +++ b/boards/espressif/esp32s2_devkitc/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp32s2_devkitc/board.cmake b/boards/espressif/esp32s2_devkitc/board.cmake new file mode 100644 index 0000000..2f04d1f --- /dev/null +++ b/boards/espressif/esp32s2_devkitc/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp32s2_devkitc/board.yml b/boards/espressif/esp32s2_devkitc/board.yml new file mode 100644 index 0000000..8ec0a49 --- /dev/null +++ b/boards/espressif/esp32s2_devkitc/board.yml @@ -0,0 +1,6 @@ +board: + name: esp32s2_devkitc + full_name: ESP32-S2-DevKitC + vendor: espressif + socs: + - name: esp32s2 diff --git a/boards/espressif/esp32s2_devkitc/doc/img/esp32s2_devkitc.webp b/boards/espressif/esp32s2_devkitc/doc/img/esp32s2_devkitc.webp new file mode 100644 index 0000000..07f8b7e Binary files /dev/null and b/boards/espressif/esp32s2_devkitc/doc/img/esp32s2_devkitc.webp differ diff --git a/boards/espressif/esp32s2_devkitc/doc/index.rst b/boards/espressif/esp32s2_devkitc/doc/index.rst new file mode 100644 index 0000000..63bf3ec --- /dev/null +++ b/boards/espressif/esp32s2_devkitc/doc/index.rst @@ -0,0 +1,228 @@ +.. zephyr:board:: esp32s2_devkitc + +Overview +******** + +ESP32-S2-DevKitC is an entry-level development board. This board integrates complete Wi-Fi functions. +Most of the I/O pins are broken out to the pin headers on both sides for easy interfacing. +Developers can either connect peripherals with jumper wires or mount ESP32-S2-DevKitC on a breadboard. +For more information, check `ESP32-S2-DevKitC`_. + +Hardware +******** + +ESP32-S2 is a highly integrated, low-power, single-core Wi-Fi Microcontroller SoC, designed to be secure and +cost-effective, with a high performance and a rich set of IO capabilities. + +The features include the following: + +- RSA-3072-based secure boot +- AES-XTS-256-based flash encryption +- Protected private key and device secrets from software access +- Cryptographic accelerators for enhanced performance +- Protection against physical fault injection attacks +- Various peripherals: + + - 43x programmable GPIOs + - 14x configurable capacitive touch GPIOs + - USB OTG + - LCD interface + - camera interface + - SPI + - I2S + - UART + - ADC + - DAC + - LED PWM with up to 8 channels + +For more information, check the datasheet at `ESP32-S2 Datasheet`_ or the technical reference +manual at `ESP32-S2 Technical Reference Manual`_. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +System requirements +=================== + +Prerequisites +------------- + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32s2_devkitc + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s2_devkitc + :goals: build + +The usual ``flash`` target will work with the ``esp32s2_devkitc`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s2_devkitc + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32s2_devkitc + +Debugging +********* + +ESP32-S2 support on OpenOCD is available at `OpenOCD ESP32`_. + +The following table shows the pin mapping between ESP32-S2 board and JTAG interface. + ++---------------+-----------+ +| ESP32 pin | JTAG pin | ++===============+===========+ +| MTDO / GPIO40 | TDO | ++---------------+-----------+ +| MTDI / GPIO41 | TDI | ++---------------+-----------+ +| MTCK / GPIO39 | TCK | ++---------------+-----------+ +| MTMS / GPIO42 | TMS | ++---------------+-----------+ + +Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S2`_. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s2_devkitc + :goals: build flash + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s2_devkitc + :goals: debug + +References +********** + +.. target-notes:: + +.. _`ESP32-S2-DevKitC`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/hw-reference/esp32s2/user-guide-saola-1-v1.2.html +.. _`ESP32-S2 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf +.. _`ESP32-S2 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-s2_technical_reference_manual_en.pdf +.. _`JTAG debugging for ESP32-S2`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/api-guides/jtag-debugging/index.html +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/espressif/esp32s2_devkitc/esp32s2_devkitc-pinctrl.dtsi b/boards/espressif/esp32s2_devkitc/esp32s2_devkitc-pinctrl.dtsi new file mode 100644 index 0000000..434260d --- /dev/null +++ b/boards/espressif/esp32s2_devkitc/esp32s2_devkitc-pinctrl.dtsi @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2024-2025 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + i2c1_default: i2c1_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + i2s0_default: i2s0_default { + group1 { + pinmux = , + , + , + , + , + ; + output-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; +}; diff --git a/boards/espressif/esp32s2_devkitc/esp32s2_devkitc.dts b/boards/espressif/esp32s2_devkitc/esp32s2_devkitc.dts new file mode 100644 index 0000000..337a63b --- /dev/null +++ b/boards/espressif/esp32s2_devkitc/esp32s2_devkitc.dts @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2024-2025 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "esp32s2_devkitc-pinctrl.dtsi" +#include +#include +#include + +/ { + model = "Espressif ESP32S2_DevKitC"; + compatible = "espressif,esp32s2"; + + aliases { + sw0 = &user_button; + i2c-0 = &i2c0; + watchdog0 = &wdt0; + }; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button: user_button { + label = "BOOT"; + gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&touch { + debounce-interval-ms = <30>; + href-microvolt = <2700000>; + lref-microvolt = <500000>; + href-atten-microvolt = <1000000>; + filter-mode = ; + filter-debounce-cnt = <1>; + filter-noise-thr = ; + filter-jitter-step = <4>; + filter-smooth-level = ; +}; + +&timer0 { + status = "disabled"; +}; + +&timer1 { + status = "disabled"; +}; + +&timer2 { + status = "disabled"; +}; + +&timer3 { + status = "disabled"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&i2c1 { + clock-frequency = ; + pinctrl-0 = <&i2c1_default>; + pinctrl-names = "default"; +}; + +&i2s0 { + pinctrl-0 = <&i2s0_default>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&trng0 { + status = "okay"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; +}; + +&wdt0 { + status = "okay"; +}; + +&dac { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp32s2_devkitc/esp32s2_devkitc.yaml b/boards/espressif/esp32s2_devkitc/esp32s2_devkitc.yaml new file mode 100644 index 0000000..b3598a2 --- /dev/null +++ b/boards/espressif/esp32s2_devkitc/esp32s2_devkitc.yaml @@ -0,0 +1,26 @@ +identifier: esp32s2_devkitc +name: ESP32-S2 DevKitC +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - adc + - dac + - gpio + - i2c + - i2s + - watchdog + - uart + - nvs + - pwm + - spi + - counter + - entropy + - input + - can + - dma +testing: + ignore_tags: + - bluetooth +vendor: espressif diff --git a/boards/espressif/esp32s2_devkitc/esp32s2_devkitc_defconfig b/boards/espressif/esp32s2_devkitc/esp32s2_devkitc_defconfig new file mode 100644 index 0000000..e192c24 --- /dev/null +++ b/boards/espressif/esp32s2_devkitc/esp32s2_devkitc_defconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y + +CONFIG_GPIO=y diff --git a/boards/espressif/esp32s2_devkitc/support/openocd.cfg b/boards/espressif/esp32s2_devkitc/support/openocd.cfg new file mode 100644 index 0000000..f75d53b --- /dev/null +++ b/boards/espressif/esp32s2_devkitc/support/openocd.cfg @@ -0,0 +1,4 @@ +set ESP_RTOS none + +source [find interface/ftdi/esp32s2_kaluga_v1.cfg] +source [find target/esp32s2.cfg] diff --git a/boards/espressif/esp32s2_saola/Kconfig b/boards/espressif/esp32s2_saola/Kconfig new file mode 100644 index 0000000..c6a99b1 --- /dev/null +++ b/boards/espressif/esp32s2_saola/Kconfig @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 diff --git a/boards/espressif/esp32s2_saola/Kconfig.esp32s2_saola b/boards/espressif/esp32s2_saola/Kconfig.esp32s2_saola new file mode 100644 index 0000000..f02ec0a --- /dev/null +++ b/boards/espressif/esp32s2_saola/Kconfig.esp32s2_saola @@ -0,0 +1,5 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32S2_SAOLA + select SOC_ESP32S2_WROVER_N4R2 diff --git a/boards/espressif/esp32s2_saola/Kconfig.sysbuild b/boards/espressif/esp32s2_saola/Kconfig.sysbuild new file mode 100644 index 0000000..3a2d17a --- /dev/null +++ b/boards/espressif/esp32s2_saola/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp32s2_saola/board.cmake b/boards/espressif/esp32s2_saola/board.cmake new file mode 100644 index 0000000..2f04d1f --- /dev/null +++ b/boards/espressif/esp32s2_saola/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp32s2_saola/board.yml b/boards/espressif/esp32s2_saola/board.yml new file mode 100644 index 0000000..69eacbf --- /dev/null +++ b/boards/espressif/esp32s2_saola/board.yml @@ -0,0 +1,6 @@ +board: + name: esp32s2_saola + full_name: ESP32-S2-Saola + vendor: espressif + socs: + - name: esp32s2 diff --git a/boards/espressif/esp32s2_saola/doc/img/esp32s2_saola.webp b/boards/espressif/esp32s2_saola/doc/img/esp32s2_saola.webp new file mode 100644 index 0000000..833147b Binary files /dev/null and b/boards/espressif/esp32s2_saola/doc/img/esp32s2_saola.webp differ diff --git a/boards/espressif/esp32s2_saola/doc/index.rst b/boards/espressif/esp32s2_saola/doc/index.rst new file mode 100644 index 0000000..d86a986 --- /dev/null +++ b/boards/espressif/esp32s2_saola/doc/index.rst @@ -0,0 +1,228 @@ +.. zephyr:board:: esp32s2_saola + +Overview +******** + +ESP32-S2-Saola is a small-sized ESP32-S2 based development board produced by Espressif. +Most of the I/O pins are broken out to the pin headers on both sides for easy interfacing. +Developers can either connect peripherals with jumper wires or mount ESP32-S2-Saola on a breadboard. +For more information, check `ESP32-S3-DevKitC`_. + +Hardware +******** + +ESP32-S2 is a highly integrated, low-power, single-core Wi-Fi Microcontroller SoC, designed to be secure and +cost-effective, with a high performance and a rich set of IO capabilities. + +The features include the following: + +- RSA-3072-based secure boot +- AES-XTS-256-based flash encryption +- Protected private key and device secrets from software access +- Cryptographic accelerators for enhanced performance +- Protection against physical fault injection attacks +- Various peripherals: + + - 43x programmable GPIOs + - 14x configurable capacitive touch GPIOs + - USB OTG + - LCD interface + - camera interface + - SPI + - I2S + - UART + - ADC + - DAC + - LED PWM with up to 8 channels + +For more information, check the datasheet at `ESP32-S2 Datasheet`_ or the technical reference +manual at `ESP32-S2 Technical Reference Manual`_. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +System requirements +=================== + +Prerequisites +------------- + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32s2_saola + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s2_saola + :goals: build + +The usual ``flash`` target will work with the ``esp32s2_saola`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s2_saola + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32s2_saola + +Debugging +********* + +ESP32-S2 support on OpenOCD is available at `OpenOCD ESP32`_. + +The following table shows the pin mapping between ESP32-S2 board and JTAG interface. + ++---------------+-----------+ +| ESP32 pin | JTAG pin | ++===============+===========+ +| MTDO / GPIO40 | TDO | ++---------------+-----------+ +| MTDI / GPIO41 | TDI | ++---------------+-----------+ +| MTCK / GPIO39 | TCK | ++---------------+-----------+ +| MTMS / GPIO42 | TMS | ++---------------+-----------+ + +Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S2`_. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s2_saola + :goals: build flash + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s2_saola + :goals: debug + +References +********** + +.. target-notes:: + +.. _`ESP32-S3-DevKitC`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/hw-reference/esp32s2/user-guide-saola-1-v1.2.html +.. _`ESP32-S2 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s2_datasheet_en.pdf +.. _`ESP32-S2 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-s2_technical_reference_manual_en.pdf +.. _`JTAG debugging for ESP32-S2`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/api-guides/jtag-debugging/index.html +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/espressif/esp32s2_saola/esp32s2_saola-pinctrl.dtsi b/boards/espressif/esp32s2_saola/esp32s2_saola-pinctrl.dtsi new file mode 100644 index 0000000..5b402c8 --- /dev/null +++ b/boards/espressif/esp32s2_saola/esp32s2_saola-pinctrl.dtsi @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2022-2025 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + i2c1_default: i2c1_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + i2s0_default: i2s0_default { + group1 { + pinmux = , + , + , + , + , + ; + output-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; +}; diff --git a/boards/espressif/esp32s2_saola/esp32s2_saola.dts b/boards/espressif/esp32s2_saola/esp32s2_saola.dts new file mode 100644 index 0000000..23249ce --- /dev/null +++ b/boards/espressif/esp32s2_saola/esp32s2_saola.dts @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2021-2025 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "esp32s2_saola-pinctrl.dtsi" +#include +#include +#include + +/ { + model = "Espressif ESP32S2-Saola"; + compatible = "espressif,esp32s2"; + + aliases { + sw0 = &user_button; + i2c-0 = &i2c0; + watchdog0 = &wdt0; + }; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button: user_button { + label = "BOOT"; + gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&touch { + debounce-interval-ms = <30>; + href-microvolt = <2700000>; + lref-microvolt = <500000>; + href-atten-microvolt = <1000000>; + filter-mode = ; + filter-debounce-cnt = <1>; + filter-noise-thr = ; + filter-jitter-step = <4>; + filter-smooth-level = ; +}; + +&timer0 { + status = "disabled"; +}; + +&timer1 { + status = "disabled"; +}; + +&timer2 { + status = "disabled"; +}; + +&timer3 { + status = "disabled"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&i2c1 { + clock-frequency = ; + pinctrl-0 = <&i2c1_default>; + pinctrl-names = "default"; +}; + +&i2s0 { + pinctrl-0 = <&i2s0_default>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&trng0 { + status = "okay"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; +}; + +&wdt0 { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp32s2_saola/esp32s2_saola.yaml b/boards/espressif/esp32s2_saola/esp32s2_saola.yaml new file mode 100644 index 0000000..e8a37ff --- /dev/null +++ b/boards/espressif/esp32s2_saola/esp32s2_saola.yaml @@ -0,0 +1,24 @@ +identifier: esp32s2_saola +name: ESP32-S2 Saola +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - adc + - dac + - gpio + - i2c + - i2s + - watchdog + - uart + - nvs + - pwm + - spi + - counter + - entropy + - input +testing: + ignore_tags: + - bluetooth +vendor: espressif diff --git a/boards/espressif/esp32s2_saola/esp32s2_saola_defconfig b/boards/espressif/esp32s2_saola/esp32s2_saola_defconfig new file mode 100644 index 0000000..e192c24 --- /dev/null +++ b/boards/espressif/esp32s2_saola/esp32s2_saola_defconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y + +CONFIG_GPIO=y diff --git a/boards/espressif/esp32s2_saola/support/openocd.cfg b/boards/espressif/esp32s2_saola/support/openocd.cfg new file mode 100644 index 0000000..f75d53b --- /dev/null +++ b/boards/espressif/esp32s2_saola/support/openocd.cfg @@ -0,0 +1,4 @@ +set ESP_RTOS none + +source [find interface/ftdi/esp32s2_kaluga_v1.cfg] +source [find target/esp32s2.cfg] diff --git a/boards/espressif/esp32s3_devkitc/Kconfig b/boards/espressif/esp32s3_devkitc/Kconfig new file mode 100644 index 0000000..308628a --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/Kconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_ESP32S3_DEVKITC_ESP32S3_PROCPU + default 256 if BOARD_ESP32S3_DEVKITC_ESP32S3_APPCPU diff --git a/boards/espressif/esp32s3_devkitc/Kconfig.esp32s3_devkitc b/boards/espressif/esp32s3_devkitc/Kconfig.esp32s3_devkitc new file mode 100644 index 0000000..fc15b1c --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/Kconfig.esp32s3_devkitc @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32S3_DEVKITC + select SOC_ESP32S3_WROOM_N8 + select SOC_ESP32S3_PROCPU if BOARD_ESP32S3_DEVKITC_ESP32S3_PROCPU + select SOC_ESP32S3_APPCPU if BOARD_ESP32S3_DEVKITC_ESP32S3_APPCPU diff --git a/boards/espressif/esp32s3_devkitc/Kconfig.sysbuild b/boards/espressif/esp32s3_devkitc/Kconfig.sysbuild new file mode 100644 index 0000000..8d3acb9 --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp32s3_devkitc/board.cmake b/boards/espressif/esp32s3_devkitc/board.cmake new file mode 100644 index 0000000..2f04d1f --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp32s3_devkitc/board.yml b/boards/espressif/esp32s3_devkitc/board.yml new file mode 100644 index 0000000..9d2eb95 --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/board.yml @@ -0,0 +1,6 @@ +board: + name: esp32s3_devkitc + full_name: ESP32-S3-DevKitC + vendor: espressif + socs: + - name: esp32s3 diff --git a/boards/espressif/esp32s3_devkitc/doc/img/esp32s3_devkitc.webp b/boards/espressif/esp32s3_devkitc/doc/img/esp32s3_devkitc.webp new file mode 100644 index 0000000..f838c1b Binary files /dev/null and b/boards/espressif/esp32s3_devkitc/doc/img/esp32s3_devkitc.webp differ diff --git a/boards/espressif/esp32s3_devkitc/doc/index.rst b/boards/espressif/esp32s3_devkitc/doc/index.rst new file mode 100644 index 0000000..4d5b077 --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/doc/index.rst @@ -0,0 +1,253 @@ +.. zephyr:board:: esp32s3_devkitc + +Overview +******** + +The ESP32-S3-DevKitC is an entry-level development board equipped with either ESP32-S3-WROOM-1 +or ESP32-S3-WROOM-1U, a module named for its small size. This board integrates complete Wi-Fi +and Bluetooth Low Energy functions. For more information, check `ESP32-S3-DevKitC`_. + +Hardware +******** + +ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi +and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor +(Xtensa® 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband, +RF module, and numerous peripherals. + +ESP32-S3-DevKitC includes the following features: + +- Dual core 32-bit Xtensa Microprocessor (Tensilica LX7), running up to 240MHz +- Additional vector instructions support for AI acceleration +- 512KB of SRAM +- 384KB of ROM +- Wi-Fi 802.11b/g/n +- Bluetooth LE 5.0 with long-range support and up to 2Mbps data rate + +Digital interfaces: + +- 45 programmable GPIOs +- 4x SPI +- 1x LCD interface (8-bit ~16-bit parallel RGB, I8080 and MOTO6800), supporting conversion between RGB565, YUV422, YUV420 and YUV411 +- 1x DVP 8-bit ~16-bit camera interface +- 3x UART +- 2x I2C +- 2x I2S +- 1x RMT (TX/RX) +- 1x pulse counter +- LED PWM controller, up to 8 channels +- 1x full-speed USB OTG +- 1x USB Serial/JTAG controller +- 2x MCPWM +- 1x SDIO host controller with 2 slots +- General DMA controller (GDMA), with 5 transmit channels and 5 receive channels +- 1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0) +- Addressable RGB LED, driven by GPIO38. + +Analog interfaces: + +- 2x 12-bit SAR ADCs, up to 20 channels +- 1x temperature sensor +- 14x touch sensing IOs + +Timers: + +- 4x 54-bit general-purpose timers +- 1x 52-bit system timer +- 3x watchdog timers + +Low Power: + +- Power Management Unit with five power modes +- Ultra-Low-Power (ULP) coprocessors: ULP-RISC-V and ULP-FSM + +Security: + +- Secure boot +- Flash encryption +- 4-Kbit OTP, up to 1792 bits for users +- Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature) + +Asymmetric Multiprocessing (AMP) +******************************** + +ESP32S3-DevKitC allows 2 different applications to be executed in ESP32-S3 SoC. Due to its dual-core +architecture, each core can be enabled to execute customized tasks in stand-alone mode +and/or exchanging data over OpenAMP framework. See :zephyr:code-sample-category:`ipc` folder as code reference. + +For more information, check the datasheet at `ESP32-S3 Datasheet`_ or the technical reference +manual at `ESP32-S3 Technical Reference Manual`_. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +Prerequisites +------------- + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32-S3 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32s3_devkitc/esp32s3/procpu + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │   └── zephyr + │   ├── zephyr.elf + │   └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_devkitc/esp32s3/procpu + :goals: build + +The usual ``flash`` target will work with the ``esp32s3_devkitc`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_devkitc/esp32s3/procpu + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32s3_devkitc + +Debugging +********* + +ESP32-S3 support on OpenOCD is available at `OpenOCD ESP32`_. + +ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB cable connected to the D+/D- pins is necessary. + +Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S3`_. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_devkitc/esp32s3/procpu + :goals: build flash + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_devkitc/esp32s3/procpu + :goals: debug + +References +********** + +.. target-notes:: + +.. _`ESP32-S3-DevKitC`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/hw-reference/esp32s3/user-guide-devkitc-1.html +.. _`ESP32-S3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s3-wroom-1_wroom-1u_datasheet_en.pdf +.. _`ESP32-S3 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf +.. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/ +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc-pinctrl.dtsi b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc-pinctrl.dtsi new file mode 100644 index 0000000..0eef5f1 --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc-pinctrl.dtsi @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + uart1_default: uart1_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + i2c1_default: i2c1_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + i2s0_default: i2s0_default { + group1 { + pinmux = , + , + , + , + , + ; + output-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + i2s1_default: i2s1_default { + group1 { + pinmux = , + , + , + , + , + ; + output-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + twai_default: twai_default { + group1 { + pinmux = , + ; + }; + }; +}; diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts new file mode 100644 index 0000000..bac7de2 --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include +#include "esp32s3_devkitc-pinctrl.dtsi" + +/ { + model = "Espressif ESP32S3-DevkitC APPCPU"; + compatible = "espressif,esp32s3"; + + chosen { + zephyr,sram = &sram1; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; + }; +}; + +&trng0 { + status = "okay"; +}; + +&ipm0 { + status = "okay"; +}; diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.yaml b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.yaml new file mode 100644 index 0000000..d62dc5f --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.yaml @@ -0,0 +1,27 @@ +identifier: esp32s3_devkitc/esp32s3/appcpu +name: ESP32-S3 DevKitC APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp +vendor: espressif diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu_defconfig b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu_defconfig new file mode 100644 index 0000000..4854664 --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu_defconfig @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CLOCK_CONTROL=y diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.dts b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.dts new file mode 100644 index 0000000..a7dec60 --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.dts @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include +#include +#include +#include "esp32s3_devkitc-pinctrl.dtsi" + +/ { + model = "Espressif ESP32S3-DevkitC PROCPU"; + compatible = "espressif,esp32s3"; + + aliases { + i2c-0 = &i2c0; + watchdog0 = &wdt0; + }; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,bt-hci = &esp32_bt_hci; + }; + + aliases { + uart-0 = &uart0; + sw0 = &button0; + }; + + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "BOOT Button"; + zephyr,code = ; + }; + }; +}; + +&usb_serial { + status = "disabled"; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&touch { + debounce-interval-ms = <30>; + href-microvolt = <2700000>; + lref-microvolt = <500000>; + href-atten-microvolt = <1000000>; + filter-mode = ; + filter-debounce-cnt = <1>; + filter-noise-thr = ; + filter-jitter-step = <4>; + filter-smooth-level = ; +}; + +&i2c0 { + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&i2c1 { + clock-frequency = ; + pinctrl-0 = <&i2c1_default>; + pinctrl-names = "default"; +}; + +&i2s0 { + pinctrl-0 = <&i2s0_default>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&i2s1 { + pinctrl-0 = <&i2s1_default>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; +}; + +&twai { + pinctrl-0 = <&twai_default>; + pinctrl-names = "default"; +}; + +&timer0 { + status = "disabled"; +}; + +&timer1 { + status = "disabled"; +}; + +&timer2 { + status = "disabled"; +}; + +&timer3 { + status = "disabled"; +}; + +&wdt0 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; + +&esp32_bt_hci { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.yaml b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.yaml new file mode 100644 index 0000000..ae1de50 --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.yaml @@ -0,0 +1,20 @@ +identifier: esp32s3_devkitc/esp32s3/procpu +name: ESP32-S3 DevKitC PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - gpio + - uart + - i2c + - i2s + - spi + - can + - counter + - watchdog + - entropy + - pwm + - dma + - input +vendor: espressif diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu_defconfig b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu_defconfig new file mode 100644 index 0000000..d8fbaa8 --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu_defconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y +CONFIG_CLOCK_CONTROL=y diff --git a/boards/espressif/esp32s3_devkitc/support/openocd.cfg b/boards/espressif/esp32s3_devkitc/support/openocd.cfg new file mode 100644 index 0000000..2f740b4 --- /dev/null +++ b/boards/espressif/esp32s3_devkitc/support/openocd.cfg @@ -0,0 +1,7 @@ +set ESP_RTOS none +set ESP32_ONLYCPU 1 + +# Source the JTAG interface configuration file +source [find interface/esp_usb_jtag.cfg] +# Source the ESP32-S3 configuration file +source [find target/esp32s3.cfg] diff --git a/boards/espressif/esp32s3_devkitm/Kconfig b/boards/espressif/esp32s3_devkitm/Kconfig new file mode 100644 index 0000000..84e633e --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/Kconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_ESP32S3_DEVKITM_ESP32S3_PROCPU + default 256 if BOARD_ESP32S3_DEVKITM_ESP32S3_APPCPU diff --git a/boards/espressif/esp32s3_devkitm/Kconfig.esp32s3_devkitm b/boards/espressif/esp32s3_devkitm/Kconfig.esp32s3_devkitm new file mode 100644 index 0000000..b574cf3 --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/Kconfig.esp32s3_devkitm @@ -0,0 +1,7 @@ +# Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32S3_DEVKITM + select SOC_ESP32S3_MINI_N8 + select SOC_ESP32S3_PROCPU if BOARD_ESP32S3_DEVKITM_ESP32S3_PROCPU + select SOC_ESP32S3_APPCPU if BOARD_ESP32S3_DEVKITM_ESP32S3_APPCPU diff --git a/boards/espressif/esp32s3_devkitm/Kconfig.sysbuild b/boards/espressif/esp32s3_devkitm/Kconfig.sysbuild new file mode 100644 index 0000000..3a2d17a --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp32s3_devkitm/board.cmake b/boards/espressif/esp32s3_devkitm/board.cmake new file mode 100644 index 0000000..2f04d1f --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp32s3_devkitm/board.yml b/boards/espressif/esp32s3_devkitm/board.yml new file mode 100644 index 0000000..0e4abba --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/board.yml @@ -0,0 +1,6 @@ +board: + name: esp32s3_devkitm + full_name: ESP32-S3-DevKitM + vendor: espressif + socs: + - name: esp32s3 diff --git a/boards/espressif/esp32s3_devkitm/doc/img/esp32s3_devkitm.webp b/boards/espressif/esp32s3_devkitm/doc/img/esp32s3_devkitm.webp new file mode 100644 index 0000000..9a2c127 Binary files /dev/null and b/boards/espressif/esp32s3_devkitm/doc/img/esp32s3_devkitm.webp differ diff --git a/boards/espressif/esp32s3_devkitm/doc/index.rst b/boards/espressif/esp32s3_devkitm/doc/index.rst new file mode 100644 index 0000000..044a3a6 --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/doc/index.rst @@ -0,0 +1,253 @@ +.. zephyr:board:: esp32s3_devkitm + +Overview +******** + +The ESP32-S3-DevKitM is an entry-level development board equipped with either ESP32-S3-MINI-1 +or ESP32-S3-MINI-1U, a module named for its small size. This board integrates complete Wi-Fi +and Bluetooth Low Energy functions. For more information, check `ESP32-S3-DevKitM User Guide`_. + +Hardware +******** + +ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi +and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor +(Xtensa® 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband, +RF module, and numerous peripherals. + +ESP32-S3-DevKitM includes the following features: + +- Dual core 32-bit Xtensa Microprocessor (Tensilica LX7), running up to 240MHz +- Additional vector instructions support for AI acceleration +- 512KB of SRAM +- 384KB of ROM +- Wi-Fi 802.11b/g/n +- Bluetooth LE 5.0 with long-range support and up to 2Mbps data rate + +Digital interfaces: + +- 45 programmable GPIOs +- 4x SPI +- 1x LCD interface (8-bit ~16-bit parallel RGB, I8080 and MOTO6800), supporting conversion between RGB565, YUV422, YUV420 and YUV411 +- 1x DVP 8-bit ~16-bit camera interface +- 3x UART +- 2x I2C +- 2x I2S +- 1x RMT (TX/RX) +- 1x pulse counter +- LED PWM controller, up to 8 channels +- 1x full-speed USB OTG +- 1x USB Serial/JTAG controller +- 2x MCPWM +- 1x SDIO host controller with 2 slots +- General DMA controller (GDMA), with 5 transmit channels and 5 receive channels +- 1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0) +- Addressable RGB LED, driven by GPIO48. + +Analog interfaces: + +- 2x 12-bit SAR ADCs, up to 20 channels +- 1x temperature sensor +- 14x touch sensing IOs + +Timers: + +- 4x 54-bit general-purpose timers +- 1x 52-bit system timer +- 3x watchdog timers + +Low Power: + +- Power Management Unit with five power modes +- Ultra-Low-Power (ULP) coprocessors: ULP-RISC-V and ULP-FSM + +Security: + +- Secure boot +- Flash encryption +- 4-Kbit OTP, up to 1792 bits for users +- Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature) + +Asymmetric Multiprocessing (AMP) +******************************** + +ESP32S3-DevKitM allows 2 different applications to be executed in ESP32-S3 SoC. Due to its dual-core +architecture, each core can be enabled to execute customized tasks in stand-alone mode +and/or exchanging data over OpenAMP framework. See :zephyr:code-sample-category:`ipc` folder as code reference. + +For more information, check the datasheet at `ESP32-S3 Datasheet`_ or the technical reference +manual at `ESP32-S3 Technical Reference Manual`_. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +Prerequisites +------------- + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32s3_devkitm + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_devkitm/esp32s3/procpu + :goals: build + +The usual ``flash`` target will work with the ``esp32s3_devkitm`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_devkitm/esp32s3/procpu + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32s3_devkitm + +Debugging +********* + +ESP32-S3 support on OpenOCD is available at `OpenOCD ESP32`_. + +ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB cable connected to the D+/D- pins is necessary. + +Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S3`_. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_devkitm/esp32s3/procpu + :goals: build flash + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_devkitm/esp32s3/procpu + :goals: debug + +References +********** + +.. target-notes:: + +.. _`ESP32-S3-DevKitM User Guide`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/hw-reference/esp32s3/user-guide-devkitm-1.html +.. _`ESP32-S3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s3-mini-1_mini-1u_datasheet_en.pdf +.. _`ESP32-S3 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases +.. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/ diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi new file mode 100644 index 0000000..adbe936 --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + uart1_default: uart1_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + i2c1_default: i2c1_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + i2s0_default: i2s0_default { + group1 { + pinmux = , + , + , + , + , + ; + output-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + i2s1_default: i2s1_default { + group1 { + pinmux = , + , + , + , + , + ; + output-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + twai_default: twai_default { + group1 { + pinmux = , + ; + }; + }; +}; diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts new file mode 100644 index 0000000..08a9e00 --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include +#include "esp32s3_devkitm-pinctrl.dtsi" + +/ { + model = "Espressif ESP32S3-DevkitM APPCPU"; + compatible = "espressif,esp32s3"; + + chosen { + zephyr,sram = &sram1; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; + }; +}; + +&trng0 { + status = "okay"; +}; + +&ipm0 { + status = "okay"; +}; diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.yaml b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.yaml new file mode 100644 index 0000000..7af6071 --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.yaml @@ -0,0 +1,27 @@ +identifier: esp32s3_devkitm/esp32s3/appcpu +name: ESP32-S3 DevKitM APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp +vendor: espressif diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.dts b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.dts new file mode 100644 index 0000000..c468871 --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.dts @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include +#include +#include +#include "esp32s3_devkitm-pinctrl.dtsi" + +/ { + model = "Espressif ESP32S3-DevkitM PROCPU"; + compatible = "espressif,esp32s3"; + + aliases { + i2c-0 = &i2c0; + watchdog0 = &wdt0; + }; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,bt-hci = &esp32_bt_hci; + }; + + aliases { + uart-0 = &uart0; + sw0 = &button0; + }; + + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "BOOT Button"; + zephyr,code = ; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&touch { + debounce-interval-ms = <30>; + href-microvolt = <2700000>; + lref-microvolt = <500000>; + href-atten-microvolt = <1000000>; + filter-mode = ; + filter-debounce-cnt = <1>; + filter-noise-thr = ; + filter-jitter-step = <4>; + filter-smooth-level = ; +}; + +&i2c0 { + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&i2c1 { + clock-frequency = ; + pinctrl-0 = <&i2c1_default>; + pinctrl-names = "default"; +}; + +&i2s0 { + pinctrl-0 = <&i2s0_default>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&i2s1 { + pinctrl-0 = <&i2s1_default>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; +}; + +&twai { + pinctrl-0 = <&twai_default>; + pinctrl-names = "default"; +}; + +&timer0 { + status = "disabled"; +}; + +&timer1 { + status = "disabled"; +}; + +&timer2 { + status = "disabled"; +}; + +&timer3 { + status = "disabled"; +}; + +&wdt0 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; + +&usb_serial { + status = "disabled"; +}; + +&esp32_bt_hci { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.yaml b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.yaml new file mode 100644 index 0000000..e153c2e --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.yaml @@ -0,0 +1,21 @@ +identifier: esp32s3_devkitm/esp32s3/procpu +name: ESP32-S3 DevKitM PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - gpio + - uart + - i2c + - i2s + - spi + - can + - counter + - watchdog + - entropy + - pwm + - dma + - input + - video +vendor: espressif diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu_defconfig b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu_defconfig new file mode 100644 index 0000000..d8fbaa8 --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu_defconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y +CONFIG_CLOCK_CONTROL=y diff --git a/boards/espressif/esp32s3_devkitm/support/openocd.cfg b/boards/espressif/esp32s3_devkitm/support/openocd.cfg new file mode 100644 index 0000000..2f740b4 --- /dev/null +++ b/boards/espressif/esp32s3_devkitm/support/openocd.cfg @@ -0,0 +1,7 @@ +set ESP_RTOS none +set ESP32_ONLYCPU 1 + +# Source the JTAG interface configuration file +source [find interface/esp_usb_jtag.cfg] +# Source the ESP32-S3 configuration file +source [find target/esp32s3.cfg] diff --git a/boards/espressif/esp32s3_eye/Kconfig b/boards/espressif/esp32s3_eye/Kconfig new file mode 100644 index 0000000..25042fa --- /dev/null +++ b/boards/espressif/esp32s3_eye/Kconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_ESP32S3_EYE_ESP32S3_PROCPU + default 256 if BOARD_ESP32S3_EYE_ESP32S3_APPCPU diff --git a/boards/espressif/esp32s3_eye/Kconfig.defconfig b/boards/espressif/esp32s3_eye/Kconfig.defconfig new file mode 100644 index 0000000..66745cf --- /dev/null +++ b/boards/espressif/esp32s3_eye/Kconfig.defconfig @@ -0,0 +1,11 @@ +# ESP32S3 EYE board configuration + +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_ESP32S3_EYE_ESP32S3_PROCPU + +configdefault LV_COLOR_16_SWAP + default y + +endif # BOARD_ESP32S3_EYE_ESP32S3_PROCPU diff --git a/boards/espressif/esp32s3_eye/Kconfig.esp32s3_eye b/boards/espressif/esp32s3_eye/Kconfig.esp32s3_eye new file mode 100644 index 0000000..6aa4ac4 --- /dev/null +++ b/boards/espressif/esp32s3_eye/Kconfig.esp32s3_eye @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32S3_EYE + select SOC_ESP32S3_WROOM_N8R8 + select SOC_ESP32S3_PROCPU if BOARD_ESP32S3_EYE_ESP32S3_PROCPU + select SOC_ESP32S3_APPCPU if BOARD_ESP32S3_EYE_ESP32S3_APPCPU diff --git a/boards/espressif/esp32s3_eye/Kconfig.sysbuild b/boards/espressif/esp32s3_eye/Kconfig.sysbuild new file mode 100644 index 0000000..8d3acb9 --- /dev/null +++ b/boards/espressif/esp32s3_eye/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp32s3_eye/board.cmake b/boards/espressif/esp32s3_eye/board.cmake new file mode 100644 index 0000000..2f04d1f --- /dev/null +++ b/boards/espressif/esp32s3_eye/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp32s3_eye/board.yml b/boards/espressif/esp32s3_eye/board.yml new file mode 100644 index 0000000..9396b3c --- /dev/null +++ b/boards/espressif/esp32s3_eye/board.yml @@ -0,0 +1,6 @@ +board: + name: esp32s3_eye + full_name: ESP32-S3-EYE + vendor: espressif + socs: + - name: esp32s3 diff --git a/boards/espressif/esp32s3_eye/doc/img/ESP32-S3-EYE_20210913_V03_SystemBlock.webp b/boards/espressif/esp32s3_eye/doc/img/ESP32-S3-EYE_20210913_V03_SystemBlock.webp new file mode 100644 index 0000000..7c6ee94 Binary files /dev/null and b/boards/espressif/esp32s3_eye/doc/img/ESP32-S3-EYE_20210913_V03_SystemBlock.webp differ diff --git a/boards/espressif/esp32s3_eye/doc/img/ESP32-S3-EYE_MB-annotated-photo.webp b/boards/espressif/esp32s3_eye/doc/img/ESP32-S3-EYE_MB-annotated-photo.webp new file mode 100644 index 0000000..59b10f1 Binary files /dev/null and b/boards/espressif/esp32s3_eye/doc/img/ESP32-S3-EYE_MB-annotated-photo.webp differ diff --git a/boards/espressif/esp32s3_eye/doc/img/ESP32-S3-EYE_SUB-annotated-photo.webp b/boards/espressif/esp32s3_eye/doc/img/ESP32-S3-EYE_SUB-annotated-photo.webp new file mode 100644 index 0000000..192244f Binary files /dev/null and b/boards/espressif/esp32s3_eye/doc/img/ESP32-S3-EYE_SUB-annotated-photo.webp differ diff --git a/boards/espressif/esp32s3_eye/doc/img/esp32s3_eye.webp b/boards/espressif/esp32s3_eye/doc/img/esp32s3_eye.webp new file mode 100644 index 0000000..3fd678c Binary files /dev/null and b/boards/espressif/esp32s3_eye/doc/img/esp32s3_eye.webp differ diff --git a/boards/espressif/esp32s3_eye/doc/index.rst b/boards/espressif/esp32s3_eye/doc/index.rst new file mode 100644 index 0000000..0657fa2 --- /dev/null +++ b/boards/espressif/esp32s3_eye/doc/index.rst @@ -0,0 +1,288 @@ +.. zephyr:board:: esp32s3_eye + +Overview +******** + +The ESP32-S3-EYE is a small-sized AI development board produced by `Espressif`_. +It is based on the `ESP32-S3`_ SoC. +It features a 2-Megapixel camera, an LCD display, and a microphone, which are used for image +recognition and audio processing. ESP32-S3-EYE offers plenty of storage, with an 8 MB Octal PSRAM +and a 8 MB flash. + +Hardware +******** + +The ESP32-S3-EYE board consists of two parts: the main board (ESP32-S3-EYE-MB) that integrates the +ESP32-S3-WROOM-1 module, camera, SD card slot, digital microphone, USB port, and function buttons; +and the sub board (ESP32-S3-EYE-SUB) that contains an LCD display. +The main board and sub board are connected through pin headers. + +Supported Features +------------------ + +.. zephyr:board-supported-hw:: + +Block Diagram +------------- + +The block diagram below presents main components of the ESP32-S3-EYE-MB main board (on the left) +and the ESP32-S3-EYE-SUB sub board (on the right), as well as the interconnections between +components. + +.. figure:: img/ESP32-S3-EYE_20210913_V03_SystemBlock.webp + :align: center + :alt: ESP32-S3-EYE Block Diagram + +Components on the ESP32-S3-EYE-MB Main Board +-------------------------------------------- + +.. figure:: img/ESP32-S3-EYE_MB-annotated-photo.webp + :align: center + :alt: ESP32-S3-EYE_MB + +.. list-table:: Key Components MB + :header-rows: 1 + + * - No. + - Key Component + - Description + * - 1 + - Camera + - The camera OV2640 with 2 million pixels has a 66.5° field of view and a maximum resolution of 1600x1200. You can change the resolution when developing applications. + * - 2 + - Module Power LED + - The LED (green) turns on when USB power is connected to the board. If it is not turned on, it indicates either the USB power is not supplied, or the 5 V to 3.3 V LDO is broken. Software can configure GPIO3 to set different LED statuses (turned on/off, flashing) for different statuses of the board. Note that GPIO3 must be set up in open-drain mode. Pulling GPIO3 up may burn the LED. + * - 3 + - Pin Headers + - Connect the female headers on the sub board. + * - 4 + - 5 V to 3.3 V LDO + - Power regulator that converts a 5 V supply into a 3.3 V output for the module. + * - 5 + - Digital Microphone + - The digital I2S MEMS microphone features 61 dB SNR and –26 dBFS sensitivity, working at 3.3 V. + * - 6 + - FPC Connector + - Connects the main board and the sub board. + * - 7 + - Function Button + - There are six function buttons on the board. Users can configure any functions as needed except for the RST button. + * - 8 + - ESP32-S3-WROOM-1 + - The ESP32-S3-WROOM-1 module embeds the ESP32-S3R8 chip variant that provides Wi-Fi and Bluetooth 5 (LE) connectivity, as well as dedicated vector instructions for accelerating neural network computing and signal processing. On top of the integrated 8 MB Octal SPI PSRAM offered by the SoC, the module also comes with 8 MB flash, allowing for fast data access. ESP32-S3-WROOM-1U module is also supported. + * - 9 + - MicroSD Card Slot + - Used for inserting a MicroSD card to expand memory capacity. + * - 10 + - 3.3 V to 1.5 V LDO + - Power regulator that converts a 3.3 V supply into a 1.5 V output for the camera. + * - 11 + - 3.3 V to 2.8 V LDO + - Power regulator that converts a 3.3 V supply into a 2.8 V output for the camera. + * - 12 + - USB Port + - A Micro-USB port used for 5 V power supply to the board, as well as for communication with the chip via GPIO19 and GPIO20. + * - 13 + - Battery Soldering Points + - Used for soldering a battery socket to connect an external Li-ion battery that can serve as an alternative power supply to the board. If you use an external battery, make sure it has built-in protection circuit and fuse. The recommended specifications of the battery: capacity > 1000 mAh, output voltage 3.7 V, input voltage 4.2 V – 5 V. + * - 14 + - Battery Charger Chip + - 1 A linear Li-ion battery charger (ME4054BM5G-N) in ThinSOT package. The power source for charging is the **USB Port**. + * - 15 + - Battery Red LED + - When the USB power is connected to the board and a battery is not connected, the red LED blinks. If a battery is connected and being charged, the red LED turns on. When the battery is fully charged, it turns off. + * - 16 + - Accelerometer + - Three-axis accelerometer (QMA7981) for screen rotation, etc. + +Components on the ESP32-S3-EYE-SUB Sub Board +-------------------------------------------- + +.. figure:: img/ESP32-S3-EYE_SUB-annotated-photo.webp + :align: center + :alt: ESP32-S3-EYE_SUB + +.. list-table:: Key Components SUB + :header-rows: 1 + + * - Key Component + - Description + * - LCD Display + - 1.3” LCD display, connected to ESP32-S3 over the SPI bus. + * - Strapping Pins + - Four strapping pins led out from the main board. They can be used as testing points. + * - Female Headers + - Used for mounting onto the pin headers on the main board. + * - LCD FPC Connector + - Connects the sub board and the LCD display. + * - LCD_RST + - LCD_RST testing point. You can use it to reset the LCD display with control signals. + +Prerequisites +************* + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +----------- + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +------------------ + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +-------- + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32s3_eye/esp32s3/procpu + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +------------ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_eye/esp32s3/procpu + :goals: build + +The usual ``flash`` target will work with the ``esp32s3_eye/esp32s3/procpu`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_eye/esp32s3/procpu + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32s3_eye/esp32s3/procpu + +Debugging +********* + +ESP32-S3 modules require patches to OpenOCD that are not upstreamed yet. +Espressif maintains their own fork of the project. The custom OpenOCD can be obtained at +`OpenOCD ESP32`_. + +The Zephyr SDK uses a bundled version of OpenOCD by default. +You can overwrite that behavior by adding the +``-DOPENOCD= -DOPENOCD_DEFAULT_PATH=`` +parameter when building. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_eye/esp32s3/procpu + :goals: build flash + :gen-args: -DOPENOCD= -DOPENOCD_DEFAULT_PATH= + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32s3_eye/esp32s3/procpu + :goals: debug + +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases + +.. _`Espressif`: https://espressif.com + +.. _`ESP32-S3`: https://www.espressif.com/en/products/socs/esp32-s3 diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye-pinctrl.dtsi b/boards/espressif/esp32s3_eye/esp32s3_eye-pinctrl.dtsi new file mode 100644 index 0000000..aba99bb --- /dev/null +++ b/boards/espressif/esp32s3_eye/esp32s3_eye-pinctrl.dtsi @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + i2c1_default: i2c1_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + lcd_cam_default: lcd_cam_default{ + group1 { + pinmux = ; + output-enable; + }; + group2 { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + input-enable; + bias-disable; + }; + + }; +}; diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts new file mode 100644 index 0000000..8e323c4 --- /dev/null +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include + +/ { + model = "Espressif ESP32S3-EYE APPCPU"; + compatible = "espressif,esp32s3"; + + chosen { + zephyr,sram = &sram1; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; + }; +}; + +&flash0 { + reg = <0x0 DT_SIZE_M(4)>; +}; + +&trng0 { + status = "okay"; +}; + +&ipm0 { + status = "okay"; +}; diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.yaml b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.yaml new file mode 100644 index 0000000..787fcd4 --- /dev/null +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.yaml @@ -0,0 +1,27 @@ +identifier: esp32s3_eye/esp32s3/appcpu +name: ESP32-S3 EYE APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp +vendor: espressif diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu_defconfig b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu_defconfig new file mode 100644 index 0000000..4854664 --- /dev/null +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu_defconfig @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CLOCK_CONTROL=y diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.dts b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.dts new file mode 100644 index 0000000..7391ad2 --- /dev/null +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.dts @@ -0,0 +1,210 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include "espressif/esp32s3/esp32s3_wroom_n8r8.dtsi" +#include "esp32s3_eye-pinctrl.dtsi" +#include +#include +#include +#include + +/ { + model = "Espressif ESP32S3-EYE PROCPU"; + compatible = "espressif,esp32s3"; + + aliases { + i2c-0 = &i2c0; + watchdog0 = &wdt0; + sw0 = &button0; + led0 = &green_led; + }; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &usb_serial; + zephyr,shell-uart = &usb_serial; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,bt-hci = &esp32_bt_hci; + zephyr,display = &st7789v; + zephyr,camera = &lcd_cam; + }; + + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "BOOT Button"; + zephyr,code = ; + }; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&adc0 0>; + keyup-threshold-mv = <3300>; + sample-period-ms = <50>; + + menu_key { + press-thresholds-mv = <2800>; + zephyr,code = ; + }; + + play_key { + press-thresholds-mv = <1920>; + zephyr,code = ; + }; + + up_key { + press-thresholds-mv = <350>; + zephyr,code = ; + }; + + down_key { + press-thresholds-mv = <800>; + zephyr,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + green_led: led0 { + gpios = <&gpio0 3 GPIO_OPEN_DRAIN>; + label = "Power LED"; + }; + }; + + mipi_dbi { + compatible = "zephyr,mipi-dbi-spi"; + dc-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; + spi-dev = <&spi3>; + write-only; + #address-cells = <1>; + #size-cells = <0>; + + st7789v: st7789v@0 { + compatible = "sitronix,st7789v"; + mipi-max-frequency = <20000000>; + reg = <0>; + width = <240>; + height = <240>; + x-offset = <0>; + y-offset = <0>; + vcom = <0x19>; + gctrl = <0x35>; + vrhs = <0x12>; + vdvs = <0x20>; + mdac = <0x00>; + gamma = <0x01>; + colmod = <0x55>; + lcm = <0x2c>; + porch-param = [0c 0c 00 33 33]; + cmd2en-param = [5a 69 02 01]; + pwctrl1-param = [a4 a1]; + pvgam-param = [D0 04 0D 11 13 2B 3F 54 4C 18 0D 0B 1F 23]; + nvgam-param = [D0 04 0C 11 13 2C 3F 44 51 2F 1F 1F 20 23]; + ram-param = [00 F0]; + rgb-param = [CD 08 14]; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; + }; + }; +}; + +&dma { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c1_default>; + pinctrl-names = "default"; + ov2640: ov2640@30 { + compatible = "ovti,ov2640"; + reg = <0x30>; + status = "okay"; + clock-rate-control = <0x80>; + port { + ov2640_ep_out: endpoint { + remote-endpoint = <&dvp_ep_in>; + }; + }; + }; +}; + +&lcd_cam { + status = "okay"; + cam-clk = < 10000000 >; + pinctrl-0 = <&lcd_cam_default>; + pinctrl-names = "default"; + source = <&ov2640>; + dmas = <&dma 2>; + dma-names = "rx"; + port { + dvp_ep_in: endpoint { + remote-endpoint = <&ov2640_ep_out>; + }; + }; +}; + +&usb_serial { + status = "okay"; +}; + +&timer0 { + status = "okay"; +}; + +&timer1 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&adc0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1_4"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; +}; + +&wdt0 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; + +&esp32_bt_hci { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.yaml b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.yaml new file mode 100644 index 0000000..1159b63 --- /dev/null +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.yaml @@ -0,0 +1,20 @@ +identifier: esp32s3_eye/esp32s3/procpu +name: ESP32-S3 EYE PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - gpio + - uart + - i2c + - spi + - can + - counter + - watchdog + - entropy + - pwm + - dma + - input + - video +vendor: espressif diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_procpu_defconfig b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu_defconfig new file mode 100644 index 0000000..32d7051 --- /dev/null +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu_defconfig @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y +CONFIG_CLOCK_CONTROL=y +CONFIG_ADC=y +CONFIG_ESP_SPIRAM=y +CONFIG_SPIRAM_MODE_OCT=y diff --git a/boards/espressif/esp32s3_eye/support/openocd.cfg b/boards/espressif/esp32s3_eye/support/openocd.cfg new file mode 100644 index 0000000..2f740b4 --- /dev/null +++ b/boards/espressif/esp32s3_eye/support/openocd.cfg @@ -0,0 +1,7 @@ +set ESP_RTOS none +set ESP32_ONLYCPU 1 + +# Source the JTAG interface configuration file +source [find interface/esp_usb_jtag.cfg] +# Source the ESP32-S3 configuration file +source [find target/esp32s3.cfg] diff --git a/boards/espressif/esp8684_devkitm/Kconfig b/boards/espressif/esp8684_devkitm/Kconfig new file mode 100644 index 0000000..c6a99b1 --- /dev/null +++ b/boards/espressif/esp8684_devkitm/Kconfig @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 diff --git a/boards/espressif/esp8684_devkitm/Kconfig.esp8684_devkitm b/boards/espressif/esp8684_devkitm/Kconfig.esp8684_devkitm new file mode 100644 index 0000000..5dddf33 --- /dev/null +++ b/boards/espressif/esp8684_devkitm/Kconfig.esp8684_devkitm @@ -0,0 +1,7 @@ +# ESP8684 devkitm board configuration + +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP8684_DEVKITM + select SOC_ESP8684_MINI_H4 diff --git a/boards/espressif/esp8684_devkitm/Kconfig.sysbuild b/boards/espressif/esp8684_devkitm/Kconfig.sysbuild new file mode 100644 index 0000000..8d3acb9 --- /dev/null +++ b/boards/espressif/esp8684_devkitm/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp8684_devkitm/board.cmake b/boards/espressif/esp8684_devkitm/board.cmake new file mode 100644 index 0000000..2f04d1f --- /dev/null +++ b/boards/espressif/esp8684_devkitm/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp8684_devkitm/board.yml b/boards/espressif/esp8684_devkitm/board.yml new file mode 100644 index 0000000..c6e86e6 --- /dev/null +++ b/boards/espressif/esp8684_devkitm/board.yml @@ -0,0 +1,6 @@ +board: + name: esp8684_devkitm + full_name: ESP8684-DevKitM + vendor: espressif + socs: + - name: esp32c2 diff --git a/boards/espressif/esp8684_devkitm/doc/img/esp8684_devkitm.webp b/boards/espressif/esp8684_devkitm/doc/img/esp8684_devkitm.webp new file mode 100644 index 0000000..519a066 Binary files /dev/null and b/boards/espressif/esp8684_devkitm/doc/img/esp8684_devkitm.webp differ diff --git a/boards/espressif/esp8684_devkitm/doc/index.rst b/boards/espressif/esp8684_devkitm/doc/index.rst new file mode 100644 index 0000000..c5e00b5 --- /dev/null +++ b/boards/espressif/esp8684_devkitm/doc/index.rst @@ -0,0 +1,225 @@ +.. zephyr:board:: esp8684_devkitm + +Overview +******** + +The ESP8684-DevKitM is an entry-level development board based on ESP8684-MINI-1, a general-purpose +module with 1 MB/2 MB/4 MB SPI flash. This board integrates complete Wi-Fi and Bluetooth LE functions. +For more information, check `ESP8684-DevKitM User Guide`_ + +Hardware +******** + +ESP32-C2 (ESP8684 core) is a low-cost, Wi-Fi 4 & Bluetooth 5 (LE) chip. Its unique design +makes the chip smaller and yet more powerful than ESP8266. ESP32-C2 is built around a RISC-V +32-bit, single-core processor, with 272 KB of SRAM (16 KB dedicated to cache) and 576 KB of ROM. +ESP32-C2 has been designed to target simple, high-volume, and low-data-rate IoT applications, +such as smart plugs and smart light bulbs. ESP32-C2 offers easy and robust wireless connectivity, +which makes it the go-to solution for developing simple, user-friendly and reliable +smart-home devices. For more information, check `ESP8684 Datasheet`_. + +Features include the following: + +- 32-bit core RISC-V microcontroller with a maximum clock speed of 120 MHz +- 2 MB or 4 MB in chip (ESP8684) or in package (ESP32-C2) flash +- 272 KB of internal RAM +- 802.11b/g/n +- A Bluetooth LE subsystem that supports features of Bluetooth 5 and Bluetooth Mesh +- Various peripherals: + + - 14 programmable GPIOs + - 3 SPI + - 2 UART + - 1 I2C Master + - LED PWM controller, with up to 6 channels + - General DMA controller (GDMA) + - 1 12-bit SAR ADC, up to 5 channels + - 1 temperature sensor + - 1 54-bit general-purpose timer + - 2 watchdog timers + - 1 52-bit system timer + +- Cryptographic hardware acceleration (RNG, ECC, RSA, SHA-2, AES) + +For detailed information check `ESP8684 Technical Reference Manual`_. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +For a getting started user guide, please check `ESP8684-DevKitM User Guide`_. + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp8684_devkitm + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp8684_devkitm + :goals: build + +The usual ``flash`` target will work with the ``esp8684_devkitm`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp8684_devkitm + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp8684_devkitm + +Debugging +********* + +As with much custom hardware, the ESP8684 modules require patches to +OpenOCD that are not upstreamed yet. Espressif maintains their own fork of +the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_. + +The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the +``-DOPENOCD= -DOPENOCD_DEFAULT_PATH=`` +parameter when building. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp8684_devkitm + :goals: build flash + :gen-args: -DOPENOCD= -DOPENOCD_DEFAULT_PATH= + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp8684_devkitm + :goals: debug + +References +********** + +.. target-notes:: + +.. _`ESP8684-DevKitM User Guide`: https://docs.espressif.com/projects/esp-dev-kits/en/latest/esp8684/esp8684-devkitm-1/user_guide.html +.. _`ESP8684 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp8684_datasheet_en.pdf +.. _`ESP8684 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentation/esp8684_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/espressif/esp8684_devkitm/esp8684_devkitm-pinctrl.dtsi b/boards/espressif/esp8684_devkitm/esp8684_devkitm-pinctrl.dtsi new file mode 100644 index 0000000..dda91ad --- /dev/null +++ b/boards/espressif/esp8684_devkitm/esp8684_devkitm-pinctrl.dtsi @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; +}; diff --git a/boards/espressif/esp8684_devkitm/esp8684_devkitm.dts b/boards/espressif/esp8684_devkitm/esp8684_devkitm.dts new file mode 100644 index 0000000..6f51083 --- /dev/null +++ b/boards/espressif/esp8684_devkitm/esp8684_devkitm.dts @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "esp8684_devkitm-pinctrl.dtsi" +#include +#include + +/ { + model = "Espressif ESP8684-DevkitM"; + compatible = "espressif,esp32c2"; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + aliases { + sw0 = &user_button1; + i2c-0 = &i2c0; + watchdog0 = &wdt0; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button1: button_1 { + label = "User SW1"; + gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <74880>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&trng0 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&timer0 { + status = "disabled"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp8684_devkitm/esp8684_devkitm.yaml b/boards/espressif/esp8684_devkitm/esp8684_devkitm.yaml new file mode 100644 index 0000000..e10093f --- /dev/null +++ b/boards/espressif/esp8684_devkitm/esp8684_devkitm.yaml @@ -0,0 +1,18 @@ +identifier: esp8684_devkitm +name: ESP8684 +type: mcu +arch: riscv +toolchain: + - zephyr +supported: + - adc + - dma + - gpio + - watchdog + - uart + - counter + - entropy + - i2c + - pwm + - spi +vendor: espressif diff --git a/boards/espressif/esp8684_devkitm/esp8684_devkitm_defconfig b/boards/espressif/esp8684_devkitm/esp8684_devkitm_defconfig new file mode 100644 index 0000000..187793c --- /dev/null +++ b/boards/espressif/esp8684_devkitm/esp8684_devkitm_defconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y diff --git a/boards/espressif/esp8684_devkitm/support/openocd.cfg b/boards/espressif/esp8684_devkitm/support/openocd.cfg new file mode 100644 index 0000000..9320970 --- /dev/null +++ b/boards/espressif/esp8684_devkitm/support/openocd.cfg @@ -0,0 +1,5 @@ +set ESP_RTOS none + +# Use external JTAG interface, such as ESP-Prog +source [find interface/ftdi/esp32_devkitj_v1.cfg] +source [find target/esp32c2.cfg] diff --git a/boards/espressif/esp_wrover_kit/Kconfig b/boards/espressif/esp_wrover_kit/Kconfig new file mode 100644 index 0000000..6499798 --- /dev/null +++ b/boards/espressif/esp_wrover_kit/Kconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_ESP_WROVER_KIT_ESP32_PROCPU + default 256 if BOARD_ESP_WROVER_KIT_ESP32_APPCPU diff --git a/boards/espressif/esp_wrover_kit/Kconfig.defconfig b/boards/espressif/esp_wrover_kit/Kconfig.defconfig new file mode 100644 index 0000000..3fed008 --- /dev/null +++ b/boards/espressif/esp_wrover_kit/Kconfig.defconfig @@ -0,0 +1,11 @@ +# ESP-WROVER-KIT board configuration + +# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_ESP_WROVER_KIT_ESP32_PROCPU + +config DISK_DRIVER_SDMMC + default y + +endif # BOARD_ESP_WROVER_KIT_ESP32_PROCPU diff --git a/boards/espressif/esp_wrover_kit/Kconfig.esp_wrover_kit b/boards/espressif/esp_wrover_kit/Kconfig.esp_wrover_kit new file mode 100644 index 0000000..b83fce2 --- /dev/null +++ b/boards/espressif/esp_wrover_kit/Kconfig.esp_wrover_kit @@ -0,0 +1,9 @@ +# ESP-WROVER-KIT board configuration + +# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP_WROVER_KIT + select SOC_ESP32_WROVER_E_N4R8 + select SOC_ESP32_PROCPU if BOARD_ESP_WROVER_KIT_ESP32_PROCPU + select SOC_ESP32_APPCPU if BOARD_ESP_WROVER_KIT_ESP32_APPCPU diff --git a/boards/espressif/esp_wrover_kit/Kconfig.sysbuild b/boards/espressif/esp_wrover_kit/Kconfig.sysbuild new file mode 100644 index 0000000..3a2d17a --- /dev/null +++ b/boards/espressif/esp_wrover_kit/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/espressif/esp_wrover_kit/board.cmake b/boards/espressif/esp_wrover_kit/board.cmake new file mode 100644 index 0000000..2f04d1f --- /dev/null +++ b/boards/espressif/esp_wrover_kit/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/espressif/esp_wrover_kit/board.yml b/boards/espressif/esp_wrover_kit/board.yml new file mode 100644 index 0000000..feb5c6b --- /dev/null +++ b/boards/espressif/esp_wrover_kit/board.yml @@ -0,0 +1,6 @@ +board: + name: esp_wrover_kit + full_name: ESP-WROVER-KIT + vendor: espressif + socs: + - name: esp32 diff --git a/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-block-diagram.jpg b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-block-diagram.jpg new file mode 100644 index 0000000..2d35b15 Binary files /dev/null and b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-block-diagram.jpg differ diff --git a/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp14.jpg b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp14.jpg new file mode 100644 index 0000000..3c68369 Binary files /dev/null and b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp14.jpg differ diff --git a/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp2-jtag.jpg b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp2-jtag.jpg new file mode 100644 index 0000000..cfc6cc0 Binary files /dev/null and b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp2-jtag.jpg differ diff --git a/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp2-tx-rx.jpg b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp2-tx-rx.jpg new file mode 100644 index 0000000..2910ba6 Binary files /dev/null and b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp2-tx-rx.jpg differ diff --git a/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp7-ext_5v.jpg b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp7-ext_5v.jpg new file mode 100644 index 0000000..4109120 Binary files /dev/null and b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp7-ext_5v.jpg differ diff --git a/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp7-usb_5v.jpg b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp7-usb_5v.jpg new file mode 100644 index 0000000..050f5a9 Binary files /dev/null and b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-jp7-usb_5v.jpg differ diff --git a/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-layout-back.jpg b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-layout-back.jpg new file mode 100644 index 0000000..780a920 Binary files /dev/null and b/boards/espressif/esp_wrover_kit/doc/img/esp-wrover-kit-v4.1-layout-back.jpg differ diff --git a/boards/espressif/esp_wrover_kit/doc/img/esp_wrover_kit.jpg b/boards/espressif/esp_wrover_kit/doc/img/esp_wrover_kit.jpg new file mode 100644 index 0000000..8cb975f Binary files /dev/null and b/boards/espressif/esp_wrover_kit/doc/img/esp_wrover_kit.jpg differ diff --git a/boards/espressif/esp_wrover_kit/doc/index.rst b/boards/espressif/esp_wrover_kit/doc/index.rst new file mode 100644 index 0000000..0c5a2ee --- /dev/null +++ b/boards/espressif/esp_wrover_kit/doc/index.rst @@ -0,0 +1,621 @@ +.. zephyr:board:: esp_wrover_kit + +Overview +******** + +ESP-WROVER-KIT is an ESP32-based development board produced by `Espressif `_. + +ESP-WROVER-KIT features the following integrated components: + +- ESP32-WROVER-E module +- LCD screen +- MicroSD card slot + +Its another distinguishing feature is the embedded FTDI FT2232HL chip - an advanced multi-interface +USB bridge. This chip enables to use JTAG for direct debugging of ESP32 through the USB interface +without a separate JTAG debugger. ESP-WROVER-KIT makes development convenient, easy, and +cost-effective. + +Most of the ESP32 I/O pins are broken out to the board's pin headers for easy access. + +.. note:: + + ESP32's GPIO16 and GPIO17 are used as chip select and clock signals for PSRAM. By default, the two + GPIOs are not broken out to the board's pin headers in order to ensure reliable performance. + +For more information, check `ESP32-WROVER-E Datasheet`_ and `ESP32 Datasheet`_. + +Functionality Overview +********************** + +The block diagram below shows the main components of ESP-WROVER-KIT and their interconnections. + +.. image:: img/esp-wrover-kit-block-diagram.jpg + :align: center + :alt: ESP-WROVER-KIT + +Functional Description +********************** + +The following two figures and the table below describe the key components, interfaces, and controls +of the ESP-WROVER-KIT board. + +.. figure:: img/esp_wrover_kit.jpg + :align: center + :alt: esp wrover front + + ESP-WROVER-KIT board layout - front + +.. _esp wrover back: + +.. figure:: img/esp-wrover-kit-v4.1-layout-back.jpg + :align: center + :alt: esp wrover back + + ESP-WROVER-KIT board layout - back + +The table below provides description in the following manner: +- Starting from the first picture's top right corner and going clockwise +- Then moving on to the second picture + ++------------------+-------------------------------------------------------------------------+ +| Key Component | Description | ++==================+=========================================================================+ +| FT2232 | The FT2232 chip serves as a multi-protocol USB-to-serial bridge | +| | which can be programmed and controlled via USB to provide | +| | communication with ESP32. FT2232 also features USB-to-JTAG | +| | interface which is available on channel A of the chip, while USB-to- | +| | serial is on channel B. The FT2232 chip enhances user-friendliness in | +| | terms of application development and debugging. See `ESP-WROVER-KIT | +| | V4.1 schematic | +| | `_. | ++------------------+-------------------------------------------------------------------------+ +| 32.768 kHz | External precision 32.768 kHz crystal oscillator serves as a clock with | +| | low-power consumption while the chip is in Deep-sleep mode. | ++------------------+-------------------------------------------------------------------------+ +| 0R | Zero-ohm resistor intended as a placeholder for a current shunt, can | +| | be desoldered or replaced with a current shunt to facilitate the | +| | measurement of ESP32’s current consumption in different modes. | ++------------------+-------------------------------------------------------------------------+ +| ESP32-WROVER-E | This ESP32 module features 64-Mbit PSRAM for flexible extended | +| module | storage and data processing capabilities. | ++------------------+-------------------------------------------------------------------------+ +| Diagnostic LEDs | Four red LEDs connected to the GPIO pins of FT2232. Intended for | +| | future use. | ++------------------+-------------------------------------------------------------------------+ +| UART | Serial port. The serial TX/RX signals of FT2232 and ESP32 are broken | +| | out to the inward and outward sides of JP2 respectively. By default, | +| | these pairs of pins are connected with jumpers. To use ESP32’s serial | +| | interface, remove the jumpers and connect another external serial | +| | device to the respective pins. | ++------------------+-------------------------------------------------------------------------+ +| SPI | By default, ESP32 uses its SPI interface to access flash and PSRAM | +| | memory inside the module. Use these pins to connect ESP32 to | +| | another SPI device. In this case, an extra chip select (CS) signal is | +| | needed. Please note that the voltage of this interface is 3.3 V. | ++------------------+-------------------------------------------------------------------------+ +| CTS/RTS | Serial port flow control signals: the pins are not connected to the | +| | circuitry by default. To enable them, short the respective pins of JP14 | +| | with jumpers. | ++------------------+-------------------------------------------------------------------------+ +| JTAG | JTAG interface. JTAG signals of FT2232 and ESP32 are broken out to | +| | the inward and outward sides of JP2 respectively. By default, these | +| | pairs of pins are disconnected. To enable JTAG, short the respective | +| | pins with jumpers as shown in Section | +| | :ref:`Setup Options` | ++------------------+-------------------------------------------------------------------------+ +| USB Port | USB interface. Power supply for the board as well as the | +| | communication interface between a computer and the board. | ++------------------+-------------------------------------------------------------------------+ +| EN Button | Reset button. | ++------------------+-------------------------------------------------------------------------+ +| BOOT Button | Download button. Holding down Boot and then pressing EN initiates | +| | Firmware Download mode for downloading firmware through the | ++------------------+-------------------------------------------------------------------------+ +| Power Switch | Power On/Off Switch. Toggling toward the Boot button powers the | +| | board on, toggling away from Boot powers the board off. | ++------------------+-------------------------------------------------------------------------+ +| Power Selector | Power supply selector interface. The board can be powered either via | +| | USB or via the 5V Input interface. Select the power source with a | +| | jumper. For more details, see Section Setup Options, jumper header | +| | JP7. | ++------------------+-------------------------------------------------------------------------+ +| 5V input | 5V power supply interface for a standard coaxial power connector, | +| | 5.5 x 2.1 mm, center positive. This interface can be more convenient | +| | when the board is operating autonomously (not connected to a | +| | computer). | ++------------------+-------------------------------------------------------------------------+ +| 5V Power On LED | This red LED turns on when power is supplied to the board, either | +| | from USB or 5V Input. | ++------------------+-------------------------------------------------------------------------+ +| LDO | NCP1117(1A). 5V-to-3.3V LDO. NCP1117 can provide a maximum | +| | current of 1A. The LDO on the board has a fixed output voltage. | +| | Although, the user can install an LDO with adjustable output voltage. | +| | For details, please refer to `ESP-WROVER-KIT V4.1 schematic | +| | `_. | ++------------------+-------------------------------------------------------------------------+ +| Camera Connector | Camera interface, a standard OV7670 camera module. | ++------------------+-------------------------------------------------------------------------+ +| RGB LED | Red, green and blue (RGB) light emitting diodes (LEDs), can be | +| | controlled by pulse width modulation (PWM). | ++------------------+-------------------------------------------------------------------------+ +| I/O Connector | All the pins on the ESP32 module are broken out to pin headers. You | +| | can program ESP32 to enable multiple functions, such as PWM, ADC, | +| | DAC, I2C, I2S, SPI, etc. | ++------------------+-------------------------------------------------------------------------+ +| MicroSD Card | Useful for developing applications that access MicroSD card for data | +| Slot | storage and retrieval. | ++------------------+-------------------------------------------------------------------------+ +| LCD | Support for mounting and interfacing a 3.2” SPI (standard 4-wire | +| | Serial Peripheral Interface) LCD, as shown on figure | +| | :ref:`ESP-WROVER-KIT board layout - back` | ++------------------+-------------------------------------------------------------------------+ + +.. _setup options: + +Setup Options +************* + +There are three jumper blocks available to set up the board functionality. The most frequently +required options are listed in the table below. + +.. |jmpextpwr| image:: img/esp-wrover-kit-v4.1-jp7-ext_5v.jpg + +.. |jmpusbpwr| image:: img/esp-wrover-kit-v4.1-jp7-usb_5v.jpg + +.. |jmpjtag| image:: img/esp-wrover-kit-v4.1-jp2-jtag.jpg + +.. |jmpuart| image:: img/esp-wrover-kit-v4.1-jp2-tx-rx.jpg + +.. |jmpctrl| image:: img/esp-wrover-kit-v4.1-jp14.jpg + ++------------------+--------------------------------------------------------------+ +| Header | Jumper Setting | Description of Functionality | ++========+================+=======================================================+ +| JP7 | |jmpextpwr| | Power ESP-WROVER-KIT via an external power supply | ++--------+----------------+-------------------------------------------------------+ +| JP7 | |jmpusbpwr| | Power ESP-WROVER-KIT via USB | ++--------+----------------+-------------------------------------------------------+ +| JP2 | |jmpjtag| | Enable JTAG functionality | ++--------+----------------+-------------------------------------------------------+ +| JP2 | |jmpuart| | Enable UART communication | ++--------+----------------+-------------------------------------------------------+ +| JP14 | |jmpctrl| | Enable RTS/CTS flow control for serial communication | ++--------+----------------+-------------------------------------------------------+ + +Allocation of ESP32 Pins +************************ + +Some pins / terminals of ESP32 are allocated for use with the onboard or external hardware. If +that hardware is not used, e.g., nothing is plugged into the Camera (JP4) header, then these +GPIOs can be used for other purposes. + +Some of the pins, such as GPIO0 or GPIO2, have multiple functions and some of them are shared +among onboard and external peripheral devices. Certain combinations of peripherals cannot work +together. For example, it is not possible to do JTAG debugging of an application that is using +SD card, because several pins are shared by JTAG and the SD card slot. + +In other cases, peripherals can coexist under certain conditions. This is applicable to, for +example, LCD screen and SD card that share only a single pin GPIO21. This pin is used to provide +D/C (Data / Control) signal for the LCD as well as the Card Detect signal read from the SD card +slot. If the card detect functionality is not essential, then it may be disabled by removing R167, +so both LCD and SD may operate together. + +For more details on which pins are shared among which peripherals, please refer to the table in +the next section. + +Main I/O Connector / JP1 +************************ + +The JP1 connector consists of 14x2 male pins whose functions are shown in the middle two “I/O” +columns of the table below. The two “Shared With” columns on both sides describe where else on +the board a certain GPIO is used. + ++-------------------+------+------+----------------------+ +| Shared With | I/O | I/O | Shared With | ++===================+======+======+======================+ +| n/a | 3.3V | GND | n/a | ++-------------------+------+------+----------------------+ +| NC/XTAL | IO32 | IO33 | NC/XTAL | ++-------------------+------+------+----------------------+ +| JTAG, MicroSD | IO12 | IO13 | JTAG, MicroSD | ++-------------------+------+------+----------------------+ +| JTAG, MicroSD | IO14 | IO27 | Camera | ++-------------------+------+------+----------------------+ +| Camera | IO26 | IO25 | Camera, LCD | ++-------------------+------+------+----------------------+ +| Camera | IO35 | IO34 | Camera | ++-------------------+------+------+----------------------+ +| Camera | IO39 | IO36 | Camera | ++-------------------+------+------+----------------------+ +| JTAG | EN | IO23 | Camera, LCD | ++-------------------+------+------+----------------------+ +| Camera, LCD | IO22 | IO21 | Camera, LCD, MicroSD | ++-------------------+------+------+----------------------+ +| Camera, LCD | IO19 | IO18 | Camera, LCD | ++-------------------+------+------+----------------------+ +| Camera, LCD | IO5 | IO17 | PSRAM | ++-------------------+------+------+----------------------+ +| PSRAM | IO16 | IO4 | LED, Camera, MicroSD | ++-------------------+------+------+----------------------+ +| Camera, LED, Boot | IO0 | IO2 | LED, MicroSD | ++-------------------+------+------+----------------------+ +| JTAG, MicroSD | IO15 | 5V | | ++-------------------+------+------+----------------------+ + +Legend: + + - NC/XTAL - 32.768 kHz Oscillator + - JTAG - JTAG / JP2 + - Boot - Boot button / SW2 + - Camera - Camera / JP4 + - LED - RGB LED + - MicroSD - MicroSD Card / J4 + - LCD - LCD / U5 + - PSRAM - ESP32-WROVER-E's PSRAM + +32.768 kHz Oscillator +********************* + ++---+-----------+ +| . | ESP32 Pin | ++===+===========+ +| 1 | GPIO32 | ++---+-----------+ +| 2 | GPIO33 | ++---+-----------+ + +.. note:: + + Since GPIO32 and GPIO33 are connected to the oscillator by default, they are not connected to + the JP1 I/O connector to maintain signal integrity. This allocation may be changed from the + oscillator to JP1 by desoldering the zero-ohm resistors from positions R11 / R23 and re-soldering + them to positions R12 / R24. + +SPI Flash / JP2 +*************** + ++---+--------------+ +| . | ESP32 Pin | ++===+==============+ +| 1 | CLK / GPIO6 | ++---+--------------+ +| 2 | SD0 / GPIO7 | ++---+--------------+ +| 3 | SD1 / GPIO8 | ++---+--------------+ +| 4 | SD2 / GPIO9 | ++---+--------------+ +| 5 | SD3 / GPIO10 | ++---+--------------+ +| 6 | CDM / GPIO11 | ++---+--------------+ + +.. important:: + The module's flash bus is connected to the jumper block JP2 through zero-ohm resistors R140 ~ + R145. If the flash memory needs to operate at the frequency of 80 MHz, for reasons such as + improving the integrity of bus signals, you can desolder these resistors to disconnect the + module's flash bus from the pin header JP2. + +JTAG / JP2 +********** + ++---+---------------+-------------+ +| . | ESP32 Pin | JTAG Signal | ++===+===============+=============+ +| 1 | EN | TRST_N | ++---+---------------+-------------+ +| 2 | MTMS / GPIO14 | TMS | ++---+---------------+-------------+ +| 3 | MTDO / GPIO15 | TDO | ++---+---------------+-------------+ +| 4 | MTDI / GPIO12 | TDI | ++---+---------------+-------------+ +| 5 | MTCK / GPIO13 | TCK | ++---+---------------+-------------+ + +Camera / JP4 +************ + ++----+-----------+-----------------------------+ +| . | ESP32 Pin | Camera Signal | ++====+===========+=============================+ +| 1 | n/a | 3.3V | ++----+-----------+-----------------------------+ +| 2 | n/a | Ground | ++----+-----------+-----------------------------+ +| 3 | GPIO27 | SIO_C / SCCB Clock | ++----+-----------+-----------------------------+ +| 4 | GPIO26 | SIO_D / SCCB Data | ++----+-----------+-----------------------------+ +| 5 | GPIO25 | VSYNC / Vertical Sync | ++----+-----------+-----------------------------+ +| 6 | GPIO23 | HREF / Horizontal Reference | ++----+-----------+-----------------------------+ +| 7 | GPIO22 | PCLK / Pixel Clock | ++----+-----------+-----------------------------+ +| 8 | GPIO21 | XCLK / System Clock | ++----+-----------+-----------------------------+ +| 9 | GPIO35 | D7 / Pixel Data Bit 7 | ++----+-----------+-----------------------------+ +| 10 | GPIO34 | D6 / Pixel Data Bit 6 | ++----+-----------+-----------------------------+ +| 11 | GPIO39 | D5 / Pixel Data Bit 5 | ++----+-----------+-----------------------------+ +| 12 | GPIO36 | D4 / Pixel Data Bit 4 | ++----+-----------+-----------------------------+ +| 13 | GPIO19 | D3 / Pixel Data Bit 3 | ++----+-----------+-----------------------------+ +| 14 | GPIO18 | D2 / Pixel Data Bit 2 | ++----+-----------+-----------------------------+ +| 15 | GPIO5 | D1 / Pixel Data Bit 1 | ++----+-----------+-----------------------------+ +| 16 | GPIO4 | D0 / Pixel Data Bit 0 | ++----+-----------+-----------------------------+ +| 17 | GPIO0 | RESET / Camera Reset | ++----+-----------+-----------------------------+ +| 18 | n/a | PWDN / Camera Power Down | ++----+-----------+-----------------------------+ + +- Signals D0 .. D7 denote camera data bus + +RGB LED +******* + ++----+-----------+---------+ +| . | ESP32 Pin | RGB LED | ++====+===========+=========+ +| 1 | GPIO0 | Red | ++----+-----------+---------+ +| 2 | GPIO2 | Green | ++----+-----------+---------+ +| 3 | GPIO4 | Blue | ++----+-----------+---------+ + +MicroSD Card +************ + ++---+---------------+----------------+ +| . | ESP32 Pin | MicroSD Signal | ++===+===============+================+ +| 1 | MTDI / GPIO12 | DATA2 | ++---+---------------+----------------+ +| 2 | MTCK / GPIO13 | CD / DATA3 | ++---+---------------+----------------+ +| 3 | MTDO / GPIO15 | CMD | ++---+---------------+----------------+ +| 4 | MTMS / GPIO14 | CLK | ++---+---------------+----------------+ +| 5 | GPIO2 | DATA0 | ++---+---------------+----------------+ +| 6 | GPIO4 | DATA1 | ++---+---------------+----------------+ +| 7 | GPIO21 | Card Detect | ++---+---------------+----------------+ + +LCD / U5 +******** + ++---+-----------+------------+ +| . | ESP32 Pin | LCD Signal | ++===+===========+============+ +| 1 | GPIO18 | RESET | ++---+-----------+------------+ +| 2 | GPIO19 | SCL | ++---+-----------+------------+ +| 3 | GPIO21 | D/C | ++---+-----------+------------+ +| 4 | GPIO22 | CS | ++---+-----------+------------+ +| 5 | GPIO23 | SDA | ++---+-----------+------------+ +| 6 | GPIO25 | SDO | ++---+-----------+------------+ +| 7 | GPIO5 | Backlight | ++---+-----------+------------+ + +Start Application Development +***************************** + +Before powering up your ESP-WROVER-KIT, please make sure that the board is in good +condition with no obvious signs of damage. + +Initial Setup +************* + +Please set only the following jumpers shown in the pictures below: + +- Select USB as the power source using the jumper block JP7. +- Enable UART communication using the jumper block JP2. + ++------------------------+---------------------------+ +| Power up from USB port | Enable UART communication | ++========+===============+===========================+ +| |jmpusbpwr| | |jmpuart| | ++------------------------+---------------------------+ + +Do not install any other jumpers. + +Turn the Power Switch to ON, the 5V Power On LED should light up. + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +System requirements +=================== + +Prerequisites +------------- + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +.. zephyr:board-supported-runners:: + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp_wrover_kit + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp_wrover_kit/esp32/procpu + :goals: build + +The usual ``flash`` target will work with the ``esp_wrover_kit`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp_wrover_kit/esp32/procpu + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp_wrover_kit + +Debugging +********* + +ESP32 support on OpenOCD is available at `OpenOCD ESP32`_. + +On the ESP-WROVER-KIT board, the JTAG pins are connected internally to +a USB serial port on the same device as the console. These boards +require no external hardware and are debuggable as-is. The JTAG +signals, however, must be jumpered closed to connect the internal +controller (the default is to leave them disconnected). The jumper +headers are on the right side of the board as viewed from the power +switch, next to similar headers for SPI and UART. See +`ESP-WROVER-32 V3 Getting Started Guide`_ for details. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp_wrover_kit/esp32/procpu + :goals: build flash + :gen-args: -DOPENOCD= -DOPENOCD_DEFAULT_PATH= + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp_wrover_kit/esp32/procpu + :goals: debug + +References +********** + +.. target-notes:: + +.. _`ESP32 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf (PDF) +.. _`ESP32-WROVER-E Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-wrover-e_esp32-wrover-ie_datasheet_en.pdf (PDF) +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases +.. _`ESP-WROVER-32 V3 Getting Started Guide`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32/hw-reference/esp32/get-started-wrover-kit.html diff --git a/boards/espressif/esp_wrover_kit/esp_wrover_kit-pinctrl.dtsi b/boards/espressif/esp_wrover_kit/esp_wrover_kit-pinctrl.dtsi new file mode 100644 index 0000000..62fb834 --- /dev/null +++ b/boards/espressif/esp_wrover_kit/esp_wrover_kit-pinctrl.dtsi @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + uart1_default: uart1_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + ledc0_default: ledc0_default { + group1 { + pinmux = , + , + ; + output-enable; + }; + }; + + sdhc0_default: sdhc0_default { + group1 { + pinmux = ; + bias-pull-up; + output-high; + }; + }; +}; diff --git a/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu.dts b/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu.dts new file mode 100644 index 0000000..903f48f --- /dev/null +++ b/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu.dts @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include + +/ { + model = "Espressif ESP32-Wrover-Kit APPCPU"; + compatible = "espressif,esp32"; + + chosen { + zephyr,sram = &sram1; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; + }; +}; + +&ipm0 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; diff --git a/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu.yaml b/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu.yaml new file mode 100644 index 0000000..57971b3 --- /dev/null +++ b/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu.yaml @@ -0,0 +1,27 @@ +identifier: esp_wrover_kit/esp32/appcpu +name: ESP WROVER KIT APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp +vendor: espressif diff --git a/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu_defconfig b/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu_defconfig new file mode 100644 index 0000000..4854664 --- /dev/null +++ b/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu_defconfig @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CLOCK_CONTROL=y diff --git a/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.dts b/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.dts new file mode 100644 index 0000000..552829c --- /dev/null +++ b/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.dts @@ -0,0 +1,224 @@ +/* + * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include "esp_wrover_kit-pinctrl.dtsi" +#include + +/ { + model = "Espressif ESP32-Wrover-Kit PROCPU"; + compatible = "espressif,esp32"; + + aliases { + led0 = &blue_led; + led1 = &green_led; + led2 = &red_led; + pwm-led0 = &pwm_led_red; + pwm-led1 = &pwm_led_green; + pwm-led2 = &pwm_led_blue; + red-pwm-led = &pwm_led_red; + green-pwm-led = &pwm_led_green; + blue-pwm-led = &pwm_led_blue; + uart-0 = &uart0; + i2c-0 = &i2c0; + watchdog0 = &wdt0; + sdhc0 = &sdhc1; + }; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,display = &ili9341; + zephyr,sdhc = &sdhc1; + zephyr,bt-hci = &esp32_bt_hci; + }; + + leds { + compatible = "gpio-leds"; + + blue_led: led_0 { + gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; + label = "Blue - LED0"; + }; + + green_led: led_1 { + gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; + label = "Green - LED1"; + }; + + red_led: led_2 { + gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; + label = "Red - LED2"; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + pwm_led_red: pwm_led_0 { + label = "Red PWM LED"; + pwms = <&ledc0 0 PWM_HZ(100) PWM_POLARITY_NORMAL>; + }; + pwm_led_green: pwm_led_1 { + label = "Green PWM LED"; + pwms = <&ledc0 1 PWM_HZ(100) PWM_POLARITY_NORMAL>; + }; + pwm_led_blue: pwm_led_2 { + label = "Blue PWM LED"; + pwms = <&ledc0 2 PWM_HZ(100) PWM_POLARITY_NORMAL>; + }; + }; + + mipi_dbi { + compatible = "zephyr,mipi-dbi-spi"; + dc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; + spi-dev = <&spi3>; + write-only; + #address-cells = <1>; + #size-cells = <0>; + + ili9341: ili9341@0 { + compatible = "ilitek,ili9341"; + mipi-max-frequency = <25000000>; + reg = <0>; + pixel-format = <0>; + rotation = <0>; + width = <240>; + height = <320>; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&uart1 { + status = "disabled"; + current-speed = <115200>; + pinctrl-0 = <&uart1_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; + + /* FIXME: should be part of the display node */ + lcd-backlight { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + output-low; + }; +}; + +&gpio1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + sda-gpios = <&gpio0 21 GPIO_OPEN_DRAIN>; + scl-gpios = <&gpio0 22 GPIO_OPEN_DRAIN>; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; +}; + +&ledc0 { + pinctrl-0 = <&ledc0_default>; + pinctrl-names = "default"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + channel0@0 { + reg = <0x0>; + timer = <0>; + }; + channel1@1 { + reg = <0x1>; + timer = <1>; + }; + channel2@2 { + reg = <0x2>; + timer = <2>; + }; +}; + +&timer0 { + status = "okay"; +}; + +&timer1 { + status = "okay"; +}; + +&timer2 { + status = "okay"; +}; + +&timer3 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; + +&sdhc { + sdhc1: sdhc@1 { + status = "okay"; + + pinctrl-0 = <&sdhc0_default>; + pinctrl-names = "default"; + power-delay-ms = <100>; + max-bus-freq = <52000000>; + bus-width = <4>; + + clk-pin = <14>; + cmd-pin = <15>; + d0-pin = <2>; + d1-pin = <4>; + d2-pin = <12>; + d3-pin = <13>; + + mmc { + compatible = "zephyr,sdmmc-disk"; + disk-name = "SD"; + status = "okay"; + }; + }; +}; + +&esp32_bt_hci { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.yaml b/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.yaml new file mode 100644 index 0000000..88bcdc3 --- /dev/null +++ b/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.yaml @@ -0,0 +1,20 @@ +identifier: esp_wrover_kit/esp32/procpu +name: ESP WROVER KIT PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - adc + - dac + - gpio + - i2c + - watchdog + - uart + - nvs + - pwm + - sdhc + - spi + - counter + - entropy +vendor: espressif diff --git a/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu_defconfig b/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu_defconfig new file mode 100644 index 0000000..e192c24 --- /dev/null +++ b/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu_defconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y + +CONFIG_GPIO=y diff --git a/boards/espressif/esp_wrover_kit/support/openocd.cfg b/boards/espressif/esp_wrover_kit/support/openocd.cfg new file mode 100644 index 0000000..338e6e4 --- /dev/null +++ b/boards/espressif/esp_wrover_kit/support/openocd.cfg @@ -0,0 +1,5 @@ +set ESP_RTOS none +set ESP32_ONLYCPU 1 + +source [find interface/ftdi/esp32_devkitj_v1.cfg] +source [find target/esp32.cfg] diff --git a/boards/espressif/index.rst b/boards/espressif/index.rst new file mode 100644 index 0000000..b1b7dfb --- /dev/null +++ b/boards/espressif/index.rst @@ -0,0 +1,10 @@ +.. _boards-espressif: + +Espressif +######### + +.. toctree:: + :maxdepth: 1 + :glob: + + **/* diff --git a/prj.conf b/prj.conf new file mode 100644 index 0000000..c6baee6 --- /dev/null +++ b/prj.conf @@ -0,0 +1 @@ +CONFIG_PRINTK=y diff --git a/src/main.c b/src/main.c new file mode 100644 index 0000000..b270dcd --- /dev/null +++ b/src/main.c @@ -0,0 +1,7 @@ +#include + +void main(void) +{ + printk("Hello World! %s\n", CONFIG_BOARD); +} +