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54e991294b
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c3c23efc95
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@ -30,37 +30,35 @@ Alle Register sind in einer einzigen, durchgehenden Liste pro Register-Typ (`Inp
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| Adresse (hex) | Name | Zugehörigkeit | Beschreibung |
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| :------------ | :----------------------------- | :---------------- | :---------------------------------------------------------------------------------------------------------------------------------------- |
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| **0x0000** | `VALVE_STATE_MOVEMENT` | Ventil | Kombiniertes Status-Register. **High-Byte**: Bewegung (`0`=Idle, `1`=Öffnet, `2`=Schliesst, `3`=Fehler). **Low-Byte**: Zustand (`0`=Geschlossen, `1`=Geöffnet). |
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| **0x0001** | `REG_INPUT_MOTOR_OPEN_CURRENT_MA` | Ventil | Motorstrom beim Öffnen in Milliampere (mA). |
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| **0x0002** | `REG_INPUT_MOTOR_CLOSE_CURRENT_MA` | Ventil | Motorstrom beim Schließen in Milliampere (mA). |
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| **0x0020** | `REG_INPUT_DIGITAL_INPUTS_STATE` | Eingänge | Bitmaske der digitalen Eingänge. Bit 0: Eingang 1, Bit 1: Eingang 2. `1`=Aktiv. |
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| **0x0021** | `REG_INPUT_BUTTON_EVENTS` | Eingänge | Event-Flags für Taster (Clear-on-Read). Bit 0: Taster 1 gedrückt. Bit 1: Taster 2 gedrückt. |
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| **0x00F0** | `REG_INPUT_FIRMWARE_VERSION_MAJOR_MINOR` | System | z.B. `0x0102` für v1.2. |
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| **0x00F1** | `REG_INPUT_FIRMWARE_VERSION_PATCH` | System | z.B. `3` für v1.2.3. |
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| **0x00F2** | `REG_INPUT_DEVICE_STATUS` | System | `0`=OK, `1`=Allgemeiner Fehler. |
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| **0x00F3** | `REG_INPUT_UPTIME_SECONDS_LOW` | System | Untere 16 Bit der Uptime in Sekunden. |
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| **0x00F4** | `REG_INPUT_UPTIME_SECONDS_HIGH` | System | Obere 16 Bit der Uptime. |
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| **0x00F5** | `REG_INPUT_SUPPLY_VOLTAGE_MV` | System | Aktuelle Versorgungsspannung in Millivolt (mV). |
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| **0x0100** | `REG_INPUT_FWU_LAST_CHUNK_CRC` | Firmware-Update | Enthält den CRC16 des zuletzt im Puffer empfangenen Daten-Chunks. |
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| **0x0001** | `MOTORSTROM_OPEN_MA` | Ventil | Motorstrom beim Öffnen in Milliampere (mA). |
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| **0x0002** | `MOTORSTROM_CLOSE_MA` | Ventil | Motorstrom beim Schließen in Milliampere (mA). |
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| **0x0020** | `DIGITAL_INPUTS_STATE` | Eingänge | Bitmaske der digitalen Eingänge. Bit 0: Eingang 1, Bit 1: Eingang 2. `1`=Aktiv. |
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| **0x0021** | `BUTTON_EVENTS` | Eingänge | Event-Flags für Taster (Clear-on-Read). Bit 0: Taster 1 gedrückt. Bit 1: Taster 2 gedrückt. |
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| **0x00F0** | `FIRMWARE_VERSION_MAJOR_MINOR` | System | z.B. `0x0102` für v1.2. |
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| **0x00F1** | `FIRMWARE_VERSION_PATCH` | System | z.B. `3` für v1.2.3. |
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| **0x00F2** | `DEVICE_STATUS` | System | `0`=OK, `1`=Allgemeiner Fehler. |
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| **0x00F3** | `UPTIME_SECONDS_LOW` | System | Untere 16 Bit der Uptime in Sekunden. |
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| **0x00F4** | `UPTIME_SECONDS_HIGH` | System | Obere 16 Bit der Uptime. |
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| **0x00F5** | `SUPPLY_VOLTAGE_MV` | System | Aktuelle Versorgungsspannung in Millivolt (mV). |
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| **0x0100** | `FWU_LAST_CHUNK_CRC` | Firmware-Update | Enthält den CRC16 des zuletzt im Puffer empfangenen Daten-Chunks. |
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## 3. Holding Registers (4xxxx, Read/Write)
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| Adresse (hex) | Name | Zugehörigkeit | Beschreibung |
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| :------------ | :---------------------------- | :---------------- | :---------------------------------------------------------------------------------------------------------------------------------------- |
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| **0x0000** | `REG_HOLDING_VALVE_COMMAND` | Ventil | `1`=Öffnen, `2`=Schliessen, `0`=Bewegung stoppen. |
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| **0x0001** | `REG_HOLDING_MAX_OPENING_TIME_S` | Ventil | Sicherheits-Timeout in Sekunden für den Öffnen-Vorgang. |
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| **0x0002** | `REG_HOLDING_MAX_CLOSING_TIME_S` | Ventil | Sicherheits-Timeout in Sekunden für den Schliessen-Vorgang. |
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| **0x0003** | `REG_HOLDING_END_CURRENT_THRESHOLD_OPEN_MA` | Ventil | Minimaler Stromschwellenwert in mA zur Endlagenerkennung beim Öffnen. |
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| **0x0004** | `REG_HOLDING_END_CURRENT_THRESHOLD_CLOSE_MA` | Ventil | Minimaler Stromschwellenwert in mA zur Endlagenerkennung beim Schliessen. |
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| **0x0005** | `REG_HOLDING_OBSTACLE_THRESHOLD_OPEN_MA` | Ventil | Stromschwellenwert in mA für die Hinderniserkennung beim Öffnen. |
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| **0x0006** | `REG_HOLDING_OBSTACLE_THRESHOLD_CLOSE_MA` | Ventil | Stromschwellenwert in mA für die Hinderniserkennung beim Schließen. |
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| **0x0010** | `REG_HOLDING_DIGITAL_OUTPUTS_STATE` | Ausgänge | Bitmaske zum Lesen und Schreiben der Ausgänge. Bit 0: Ausgang 1, Bit 1: Ausgang 2. `1`=AN, `0`=AUS. |
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| **0x00F0** | `REG_HOLDING_WATCHDOG_TIMEOUT_S` | System | Timeout des Fail-Safe-Watchdogs in Sekunden. `0`=Deaktiviert. |
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| **0x00F1** | `REG_HOLDING_DEVICE_RESET` | System | Schreibt `1` um das Gerät neu zu starten. |
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| **0x0100** | `REG_HOLDING_FWU_COMMAND` | Firmware-Update | `1`: **Verify Chunk**: Der zuletzt übertragene Chunk wurde vom Client als gültig befunden. Der Slave soll ihn nun ins Flash schreiben. `2`: **Finalize Update**: Alle Chunks sind übertragen. Installation abschliessen und neu starten. |
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| **0x0101** | `REG_HOLDING_FWU_CHUNK_OFFSET_LOW` | Firmware-Update | Untere 16 Bit des 32-Bit-Offsets, an den der nächste Chunk geschrieben werden soll. |
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| **0x0102** | `REG_HOLDING_FWU_CHUNK_OFFSET_HIGH` | Firmware-Update | Obere 16 Bit des 32-Bit-Offsets. |
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| **0x0103** | `REG_HOLDING_FWU_CHUNK_SIZE` | Firmware-Update | Grösse des nächsten Chunks in Bytes (max. 256). |
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| **0x0180** | `REG_HOLDING_FWU_DATA_BUFFER` | Firmware-Update | **Startadresse** eines 128x16-bit Puffers (256 Bytes). Entspricht den Registern `40384` bis `40511`. |
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| **0x0000** | `VALVE_COMMAND` | Ventil | `1`=Öffnen, `2`=Schliessen, `0`=Bewegung stoppen. |
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| **0x0001** | `MAX_OPENING_TIME_S` | Ventil | Sicherheits-Timeout in Sekunden für den Öffnen-Vorgang. |
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| **0x0002** | `MAX_CLOSING_TIME_S` | Ventil | Sicherheits-Timeout in Sekunden für den Schliessen-Vorgang. |
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| **0x0003** | `END_CURRENT_THRESHOLD_OPEN_MA` | Ventil | Minimaler Stromschwellenwert in mA zur Endlagenerkennung beim Öffnen. |
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| **0x0004** | `END_CURRENT_THRESHOLD_CLOSE_MA` | Ventil | Minimaler Stromschwellenwert in mA zur Endlagenerkennung beim Schliessen. |
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| **0x0010** | `DIGITAL_OUTPUTS_STATE` | Ausgänge | Bitmaske zum Lesen und Schreiben der Ausgänge. Bit 0: Ausgang 1, Bit 1: Ausgang 2. `1`=AN, `0`=AUS. |
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| **0x00F0** | `WATCHDOG_TIMEOUT_S` | System | Timeout des Fail-Safe-Watchdogs in Sekunden. `0`=Deaktiviert. |
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| **0x00F1** | `DEVICE_RESET` | System | Schreibt `1` um das Gerät neu zu starten. |
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| **0x0100** | `FWU_COMMAND` | Firmware-Update | `1`: **Verify Chunk**: Der zuletzt übertragene Chunk wurde vom Client als gültig befunden. Der Slave soll ihn nun ins Flash schreiben. `2`: **Finalize Update**: Alle Chunks sind übertragen. Installation abschliessen und neu starten. |
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| **0x0101** | `FWU_CHUNK_OFFSET_LOW` | Firmware-Update | Untere 16 Bit des 32-Bit-Offsets, an den der nächste Chunk geschrieben werden soll. |
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| **0x0102** | `FWU_CHUNK_OFFSET_HIGH` | Firmware-Update | Obere 16 Bit des 32-Bit-Offsets. |
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| **0x0103** | `FWU_CHUNK_SIZE` | Firmware-Update | Grösse des nächsten Chunks in Bytes (max. 256). |
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| **0x0180** | `FWU_DATA_BUFFER` | Firmware-Update | **Startadresse** eines 128x16-bit Puffers (256 Bytes). Entspricht den Registern `40384` bis `40511`. |
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## 4. Detaillierter Firmware-Update-Prozess
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@ -1,7 +0,0 @@
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cmake_minimum_required(VERSION 3.20.0)
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find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
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project(bl_test)
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# Add application source files
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target_sources(app PRIVATE src/main.c)
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@ -1,5 +0,0 @@
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VERSION_MAJOR = 0
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VERSION_MINOR = 0
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PATCHLEVEL = 1
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VERSION_TWEAK = 1
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EXTRAVERSION = devel
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@ -1,46 +0,0 @@
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# Enable Console and printk for logging via UART
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CONFIG_CONSOLE=y
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CONFIG_LOG=y
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CONFIG_UART_CONSOLE=y
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# Enable more detailed MCUMGR logging
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CONFIG_MCUMGR_LOG_LEVEL_DBG=y
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CONFIG_IMG_MANAGER_LOG_LEVEL_DBG=y
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CONFIG_STREAM_FLASH_LOG_LEVEL_DBG=y
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# Enable USB for MCUMGR only
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CONFIG_USB_DEVICE_STACK=y
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CONFIG_USB_CDC_ACM=y
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CONFIG_USB_DEVICE_INITIALIZE_AT_BOOT=y
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# USB CDC ACM buffer configuration for better MCUMGR performance
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CONFIG_USB_CDC_ACM_RINGBUF_SIZE=1024
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# Set log level to info for reasonable size
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CONFIG_LOG_DEFAULT_LEVEL=3
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# Enable MCUMGR info logging (not debug to save space)
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CONFIG_MCUMGR_LOG_LEVEL_INF=y
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# Enable USB CDC info logging
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CONFIG_USB_CDC_ACM_LOG_LEVEL_INF=y
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# STEP 5.2 - Enable mcumgr DFU in application
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# Enable MCUMGR
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CONFIG_MCUMGR=y # Enable MCUMGR management for both OS and Images
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CONFIG_MCUMGR_GRP_OS=y
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CONFIG_MCUMGR_GRP_IMG=y
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# Configure MCUMGR transport to UART (will use USB-CDC via chosen device)
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CONFIG_MCUMGR_TRANSPORT_UART=y
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# Dependencies
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# Configure dependencies for CONFIG_MCUMGR
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CONFIG_NET_BUF=y
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CONFIG_ZCBOR=y
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CONFIG_CRC=y # Configure dependencies for CONFIG_MCUMGR_GRP_IMG
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CONFIG_FLASH=y
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CONFIG_IMG_MANAGER=y # Configure dependencies for CONFIG_IMG_MANAGER
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CONFIG_STREAM_FLASH=y
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CONFIG_FLASH_MAP=y # Configure dependencies for CONFIG_MCUMGR_TRANSPORT_USB_CDC
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CONFIG_BASE64=y
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@ -1,11 +0,0 @@
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#include <zephyr/kernel.h>
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#include <zephyr/logging/log.h>
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#include <app_version.h>
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LOG_MODULE_REGISTER(bl_test_app, LOG_LEVEL_INF);
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int main(void)
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{
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LOG_INF("Hello World from bl_test! This is version %s", APP_VERSION_EXTENDED_STRING);
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return 0;
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}
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@ -1 +0,0 @@
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SB_CONFIG_BOOTLOADER_MCUBOOT=y
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@ -1,9 +0,0 @@
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#include "common.dtsi"
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/* Application Configuration - Firmware wird in slot0_partition geschrieben */
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/ {
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chosen {
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zephyr,code-partition = &slot0_partition;
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zephyr,uart-mcumgr = &cdc_acm_uart0;
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};
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};
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@ -1,94 +0,0 @@
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/*
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* Common Devicetree Configuration für weact_stm32g431_core
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* - Konfiguriert einen W25Q128 Flash-Speicher auf SPI2
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* - Konfiguriert USB-CDC für MCUMGR
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* - Setzt den Chip Select (CS) Pin auf PA5
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* - Weist das Label "flash1" zu
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*/
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/* Partitions für internes Flash (STM32G431) */
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&flash0 {
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/delete-node/ partitions; /* Entferne die Standard-Partitionen */
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/* MCUboot bootloader - 48 KB */
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 0x0000C000>;
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};
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/* Slot0 partition für primäres Application Image - 80 KB (20 sectors @ 4KB) */
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slot0_partition: partition@C000 {
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label = "image-0";
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reg = <0x0000C000 0x00014000>;
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};
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};
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};
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/* USB-CDC Konfiguration für MCUMGR */
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&usb {
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status = "okay";
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cdc_acm_uart0: cdc_acm_uart0 {
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compatible = "zephyr,cdc-acm-uart";
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};
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};
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/ {
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chosen {
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zephyr,uart-mcumgr = &cdc_acm_uart0;
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};
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};
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&spi2 {
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/* Definiere die Pins für SCK, MISO, MOSI auf Port B */
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pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>;
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pinctrl-names = "default";
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status = "okay";
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/* === Chip Select (CS) auf PA5 gesetzt === */
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cs-gpios = <&gpioa 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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/* Definiere den Flash-Chip als SPI NOR Gerät */
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flash1: flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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label = "flash1";
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/* JEDEC ID für einen Winbond W25Q128 (16 MBytes) */
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jedec-id = [ef 40 18];
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/* Speichergröße in Bytes (16 MBytes) */
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size = <DT_SIZE_M(16)>;
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/* Maximale Taktfrequenz - angepasst an STM32G431 Limits */
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spi-max-frequency = <1000000>;
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/* Partitions für externes Flash */
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/* Slot1 partition für MCUboot (sekundäres Image) - 80 KB (20 sectors @ 4KB) */
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slot1_partition: partition@0 {
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label = "image-1";
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reg = <0x00000000 0x00014000>;
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};
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/* Scratch partition für MCUboot - 80 KB (20 sectors @ 4KB) */
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scratch_partition: partition@14000 {
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label = "scratch";
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reg = <0x00014000 0x00014000>;
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};
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/* Speicher partition für LittleFS - ~15.83 MB */
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storage_partition: partition@28000 {
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label = "storage";
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reg = <0x00028000 0x00FD8000>;
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};
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};
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};
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};
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@ -1,23 +0,0 @@
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CONFIG_LOG=y
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CONFIG_MCUBOOT_LOG_LEVEL_INF=y
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# Enable UART console for MCUboot debug output
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CONFIG_UART_CONSOLE=y
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CONFIG_CONSOLE=y
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CONFIG_MCUBOOT_INDICATION_LED=y
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# Enable external SPI flash support
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CONFIG_SPI=y
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CONFIG_SPI_NOR=y
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CONFIG_SPI_NOR_SFDP_DEVICETREE=n
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CONFIG_FLASH=y
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CONFIG_FLASH_MAP=y
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CONFIG_GPIO=y
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# Add SPI NOR specific configurations - use 4KB page size (required by driver)
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CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
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CONFIG_SPI_NOR_INIT_PRIORITY=80
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# Set maximum image sectors manually since auto doesn't work with external flash
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CONFIG_BOOT_MAX_IMG_SECTORS_AUTO=n
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CONFIG_BOOT_MAX_IMG_SECTORS=80
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@ -1,8 +0,0 @@
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#include "common.dtsi"
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/* MCUboot Configuration - Bootloader wird in boot_partition geschrieben */
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/ {
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chosen {
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zephyr,code-partition = &boot_partition;
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};
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};
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Reference in New Issue