Eduard Iten f6ee0a5122 feat(weact_stm32g431_core): Configure VND7050AJ driver pins in overlay ... Updated the weact_stm32g431_core.overlay to define the GPIO and ADC pin assignments for the VND7050AJ driver. This includes: - Digital I/O pins (IN0, IN1, RST, S0, S1, SEN) configured as GPIOs. - Analog input pin (MULTISENSE/PA0) configured for ADC1.		2025-07-03 17:39:04 +02:00
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gateway	refactor(build): Streamline multi-app CMake configuration	2025-07-01 12:05:18 +02:00
slave_node	feat(weact_stm32g431_core): Configure VND7050AJ driver pins in overlay	2025-07-03 17:39:04 +02:00