sync during ir_recv dev
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This commit is contained in:
2026-02-16 14:14:34 +01:00
parent be48e8ada7
commit 4906dc31eb

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@@ -33,7 +33,7 @@ void ir_recv_sim_send_packet(ir_packet_t *packet) {
sim_packet.data.fields.crc = lastertag_crc8(sim_packet.data.bytes, 2);
sim_sample_pos = 0;
sim_trigger = true;
LOG_INF("Simulator: Packet queued (Type: %u, CRC: 0x%02X)",
LOG_DBG("Simulator: Packet queued (Type: %u, CRC: 0x%02X, Bytes: %02X %02X)",
sim_packet.data.fields.type, sim_packet.data.fields.crc);
}
@@ -132,6 +132,7 @@ static void process_ir_sample(ir_ctx_t *ctx, int16_t raw) {
bool bit = (ctx->timer >= 12);
// Right-shift: First bit ends up at bit 0
ctx->bit_acc = (ctx->bit_acc >> 1) | (bit ? (1 << 23) : 0);
LOG_DBG("Bit %u: %u (Timer: %u), Accumulator: 0x%06X", ctx->bit_count, bit, ctx->timer, ctx->bit_acc);
if (++ctx->bit_count >= 24) ctx->state = IR_STATE_VALIDATE;
else ctx->state = IR_STATE_WAIT_SPACE;
} else { ctx->state = IR_STATE_IDLE; }