feat: Complete project cleanup and Rev. 0.3 updates

- Remove unused schematic files (mcu.kicad_sch, PWR.kicad_sch)
- Update version numbering to semantic versioning (Rev. 0.0/0.1)
- Add comprehensive changelog documentation in both languages
- Create separate CHANGELOG.md and CHANGELOG.de.md files
- Update PCB to Rev. 0.3 with layout optimizations
- Professional 4-layer PCB design with optimal via stitching
- Excellent differential pair routing for CAN-bus (< 18mm)
- Superior thermal management with 19 vias at PFET drain
- Strategic power plane distribution and EMI considerations
- Production-ready PCB layout with best practices implementation

prj.pretty/Unbenannt.kicad_mod

@@ -0,0 +1,69 @@
+(footprint "Unbenannt"
+	(version 20241229)
+	(generator "pcbnew")
+	(generator_version "9.0")
+	(layer "F.Cu")
+	(property "Reference" "REF**"
+		(at 0 -0.5 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "09053d6e-dd8b-49b5-bc82-85c3ee3a68d3")
+		(effects
+			(font
+				(size 1 1)
+				(thickness 0.1)
+			)
+		)
+	)
+	(property "Value" "Unbenannt"
+		(at 0 1 0)
+		(unlocked yes)
+		(layer "F.Fab")
+		(uuid "afa435ac-0bd3-4cd8-8b73-c8928393d05d")
+		(effects
+			(font
+				(size 1 1)
+				(thickness 0.15)
+			)
+		)
+	)
+	(property "Datasheet" ""
+		(at 0 0 0)
+		(unlocked yes)
+		(layer "F.Fab")
+		(hide yes)
+		(uuid "1754232c-9927-4f38-9a86-408f71648e93")
+		(effects
+			(font
+				(size 1 1)
+				(thickness 0.15)
+			)
+		)
+	)
+	(property "Description" ""
+		(at 0 0 0)
+		(unlocked yes)
+		(layer "F.Fab")
+		(hide yes)
+		(uuid "8f815bef-00db-4750-8a77-8800f7a1be04")
+		(effects
+			(font
+				(size 1 1)
+				(thickness 0.15)
+			)
+		)
+	)
+	(fp_text user "${REFERENCE}"
+		(at 0 2.5 0)
+		(unlocked yes)
+		(layer "F.Fab")
+		(uuid "2e42921b-d4ac-4075-aef6-f9d2e4fea584")
+		(effects
+			(font
+				(size 1 1)
+				(thickness 0.15)
+			)
+		)
+	)
+	(embedded_fonts no)
+)