Initial commit with basic project structure and Firebeetle 2 board definition

2025-06-29 12:13:32 +02:00
parent 6b86f5edf4
commit a55c5601c0
205 changed files with 8183 additions and 0 deletions
--- a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi
+++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm-pinctrl.dtsi
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
+#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
+#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
+
+&pinctrl {
+	uart0_default: uart0_default {
+		group1 {
+			pinmux = <UART0_TX_GPIO43>;
+			output-high;
+		};
+		group2 {
+			pinmux = <UART0_RX_GPIO44>;
+			bias-pull-up;
+		};
+	};
+
+	uart1_default: uart1_default {
+		group1 {
+			pinmux = <UART1_TX_GPIO17>;
+			output-high;
+		};
+		group2 {
+			pinmux = <UART1_RX_GPIO18>;
+			bias-pull-up;
+		};
+	};
+
+	i2c0_default: i2c0_default {
+		group1 {
+			pinmux = <I2C0_SDA_GPIO1>,
+				 <I2C0_SCL_GPIO2>;
+			bias-pull-up;
+			drive-open-drain;
+			output-high;
+		};
+	};
+
+	i2c1_default: i2c1_default {
+		group1 {
+			pinmux = <I2C1_SDA_GPIO4>,
+				 <I2C1_SCL_GPIO5>;
+			bias-pull-up;
+			drive-open-drain;
+			output-high;
+		};
+	};
+
+	i2s0_default: i2s0_default {
+		group1 {
+			pinmux = <I2S0_MCLK_GPIO1>,
+				 <I2S0_O_WS_GPIO2>,
+				 <I2S0_O_BCK_GPIO3>,
+				 <I2S0_O_SD_GPIO4>,
+				 <I2S0_I_WS_GPIO5>,
+				 <I2S0_I_BCK_GPIO6>;
+			output-enable;
+		};
+		group2 {
+			pinmux = <I2S0_I_SD_GPIO7>;
+			input-enable;
+		};
+	};
+
+	i2s1_default: i2s1_default {
+		group1 {
+			pinmux = <I2S1_MCLK_GPIO8>,
+				 <I2S1_O_WS_GPIO9>,
+				 <I2S1_O_BCK_GPIO10>,
+				 <I2S1_O_SD_GPIO11>,
+				 <I2S1_I_WS_GPIO12>,
+				 <I2S1_I_BCK_GPIO13>;
+			output-enable;
+		};
+		group2 {
+			pinmux = <I2S1_I_SD_GPIO14>;
+			input-enable;
+		};
+	};
+
+	spim2_default: spim2_default {
+		group1 {
+			pinmux = <SPIM2_MISO_GPIO13>,
+				 <SPIM2_SCLK_GPIO12>,
+				 <SPIM2_CSEL_GPIO10>;
+		};
+		group2 {
+			pinmux = <SPIM2_MOSI_GPIO11>;
+			output-low;
+		};
+	};
+
+	spim3_default: spim3_default {
+		group1 {
+			pinmux = <SPIM3_MISO_GPIO37>,
+				 <SPIM3_SCLK_GPIO36>,
+				 <SPIM3_CSEL_GPIO38>;
+		};
+		group2 {
+			pinmux = <SPIM3_MOSI_GPIO39>;
+			output-low;
+		};
+	};
+
+	twai_default: twai_default {
+		group1 {
+			pinmux = <TWAI_TX_GPIO5>,
+				<TWAI_RX_GPIO6>;
+		};
+	};
+};