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.. zephyr:board:: esp32s3_devkitc

Overview

The ESP32-S3-DevKitC is an entry-level development board equipped with either ESP32-S3-WROOM-1 or ESP32-S3-WROOM-1U, a module named for its small size. This board integrates complete Wi-Fi and Bluetooth Low Energy functions. For more information, check ESP32-S3-DevKitC [1].

Hardware

ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor (Xtensa® 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband, RF module, and numerous peripherals.

ESP32-S3-DevKitC includes the following features:

  • Dual core 32-bit Xtensa Microprocessor (Tensilica LX7), running up to 240MHz
  • Additional vector instructions support for AI acceleration
  • 512KB of SRAM
  • 384KB of ROM
  • Wi-Fi 802.11b/g/n
  • Bluetooth LE 5.0 with long-range support and up to 2Mbps data rate

Digital interfaces:

  • 45 programmable GPIOs
  • 4x SPI
  • 1x LCD interface (8-bit ~16-bit parallel RGB, I8080 and MOTO6800), supporting conversion between RGB565, YUV422, YUV420 and YUV411
  • 1x DVP 8-bit ~16-bit camera interface
  • 3x UART
  • 2x I2C
  • 2x I2S
  • 1x RMT (TX/RX)
  • 1x pulse counter
  • LED PWM controller, up to 8 channels
  • 1x full-speed USB OTG
  • 1x USB Serial/JTAG controller
  • 2x MCPWM
  • 1x SDIO host controller with 2 slots
  • General DMA controller (GDMA), with 5 transmit channels and 5 receive channels
  • 1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0)
  • Addressable RGB LED, driven by GPIO38.

Analog interfaces:

  • 2x 12-bit SAR ADCs, up to 20 channels
  • 1x temperature sensor
  • 14x touch sensing IOs

Timers:

  • 4x 54-bit general-purpose timers
  • 1x 52-bit system timer
  • 3x watchdog timers

Low Power:

  • Power Management Unit with five power modes
  • Ultra-Low-Power (ULP) coprocessors: ULP-RISC-V and ULP-FSM

Security:

  • Secure boot
  • Flash encryption
  • 4-Kbit OTP, up to 1792 bits for users
  • Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature)

Asymmetric Multiprocessing (AMP)

ESP32S3-DevKitC allows 2 different applications to be executed in ESP32-S3 SoC. Due to its dual-core architecture, each core can be enabled to execute customized tasks in stand-alone mode and/or exchanging data over OpenAMP framework. See :zephyr:code-sample-category:`ipc` folder as code reference.

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For more information, check the datasheet at ESP32-S3 Datasheet [2] or the technical reference manual at ESP32-S3 Technical Reference Manual [3].

Supported Features

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.. zephyr:board-supported-hw::

Prerequisites

Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command below to retrieve those files.

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.. code-block:: console

   west blobs fetch hal_espressif

Note

It is recommended running the command above after :file:`west update`.

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Building & Flashing

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.. zephyr:board-supported-runners::

Simple boot

The board could be loaded using the single binary image, without 2nd stage bootloader. It is the default option when building the application without additional configuration.

Note

Simple boot does not provide any security features nor OTA updates.

MCUboot bootloader

User may choose to use MCUboot bootloader instead. In that case the bootloader must be built (and flashed) at least once.

There are two options to be used when building an application:

  1. Sysbuild
  2. Manual build

Note

User can select the MCUboot bootloader by adding the following line to the board default configuration file.

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.. code:: cfg

   CONFIG_BOOTLOADER_MCUBOOT=y

Sysbuild

The sysbuild makes possible to build and flash all necessary images needed to bootstrap the board with the ESP32-S3 SoC.

To build the sample application using sysbuild use the command:

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.. zephyr-app-commands::
   :tool: west
   :zephyr-app: samples/hello_world
   :board: esp32s3_devkitc/esp32s3/procpu
   :goals: build
   :west-args: --sysbuild
   :compact:

By default, the ESP32 sysbuild creates bootloader (MCUboot) and application images. But it can be configured to create other kind of images.

Build directory structure created by sysbuild is different from traditional Zephyr build. Output is structured by the domain subdirectories:

build/
├── hello_world
│   └── zephyr
│       ├── zephyr.elf
│       └── zephyr.bin
├── mcuboot
│    └── zephyr
│       ├── zephyr.elf
│       └── zephyr.bin
└── domains.yaml

Note

With --sysbuild option the bootloader will be re-build and re-flash every time the pristine build is used.

For more information about the system build please read the :ref:`sysbuild` documentation.

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Manual build

During the development cycle, it is intended to build & flash as quickly possible. For that reason, images can be built one at a time using traditional build.

The instructions following are relevant for both manual build and sysbuild. The only difference is the structure of the build directory.

Note

Remember that bootloader (MCUboot) needs to be flash at least once.

Build and flash applications as usual (see :ref:`build_an_application` and :ref:`application_run` for more details).

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.. zephyr-app-commands::
   :zephyr-app: samples/hello_world
   :board: esp32s3_devkitc/esp32s3/procpu
   :goals: build

The usual flash target will work with the esp32s3_devkitc board configuration. Here is an example for the :zephyr:code-sample:`hello_world` application.

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.. zephyr-app-commands::
   :zephyr-app: samples/hello_world
   :board: esp32s3_devkitc/esp32s3/procpu
   :goals: flash

Open the serial monitor using the following command:

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.. code-block:: shell

   west espressif monitor

After the board has automatically reset and booted, you should see the following message in the monitor:

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.. code-block:: console

   ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
   Hello World! esp32s3_devkitc

Debugging

ESP32-S3 support on OpenOCD is available at OpenOCD ESP32 [5].

ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB cable connected to the D+/D- pins is necessary.

Further documentation can be obtained from the SoC vendor in JTAG debugging for ESP32-S3 [4].

Here is an example for building the :zephyr:code-sample:`hello_world` application.

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.. zephyr-app-commands::
   :zephyr-app: samples/hello_world
   :board: esp32s3_devkitc/esp32s3/procpu
   :goals: build flash

You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application.

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System Message: ERROR/3 (<stdin>, line 239)

Unknown directive type "zephyr-app-commands".

.. zephyr-app-commands::
   :zephyr-app: samples/hello_world
   :board: esp32s3_devkitc/esp32s3/procpu
   :goals: debug

References

[1]https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/hw-reference/esp32s3/user-guide-devkitc-1.html
[2]https://www.espressif.com/sites/default/files/documentation/esp32-s3-wroom-1_wroom-1u_datasheet_en.pdf
[3]https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf
[4]https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/
[5]https://github.com/espressif/openocd-esp32/releases
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